Part Number: AM3356
Other Parts Discussed in Thread: 66AK2G12
On AM335x, we have Single error detection on L1 cache and ECC on L2 cache.
For the 64KB dedicated RAM and 64KB general purpose on-chip memory, it seems that SED/ECC is not implemented.
1. Why is there no SED/ECC for these internal RAM?
2. What is the soft error FIT rate for these internal RAM?