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AMIC110: Not detect the error of FCS; frame check sequence

Kanae
Guru 10085 points
Part Number: AMIC110
Other Parts Discussed in Thread: AM3357

Hi Sitara support Team,

Can EtherCAT Slave controller on AM3357/AMIC110 detect the error of FCS?

My customer needs to measure the number of "malformed packets"
for checking the effect of the NOISE-COUNTERMEASURE.

They captured the packets with the Hilscher netAnalyzer as follows connection.

EtherCAT master sends a malformed FCS (Frame Check Sequence) packet(No.9).
However, EtherCAT slaves1 to slave4 receive the packet and seem to return to
the next packet(No.10) correctly updated the working counter.

Please refer to the pcap file.
detect_NG.zip


If TI's EtherCAT slave controller does not have the function to detect the error of FCS,

is there any alternative function?

Best regards,
Kanae

  • 0
    TI__Mastermind 43296 points

    Kanae,

    The malformed FCS is detected in PRU firmware and the error frame is counted in RX Error Counter register 0x300. The customer can check the register to measure the number of "malformed packets".

    http://processors.wiki.ti.com/index.php/PRU_ICSS_EtherCAT_Slave_Controller_Register_List

    The frame with FCS error may not be destroyed as it has valid EtherType for EtherCAT. When the bit 0 of ESC DL control register 0x100 is set (by default), non-ECAT packets, i.e. non EtherCAT EtherType, are destroyed.

    Regards,
    Garrett

  • 0 in reply to Garrett Ding
    Guru 10085 points

    Hi Garrett,

    Thank for your reply.


    My customer tried increasing the test condition,
    they could confirm that it increased the error count number of AM 3357 and AMIC 110.
    However, the error count numbers are fewer than Hilscher NetAnalyzer detected the error.

    Here are additional questions.

    Q1.
    Regarding ESC Features supported (0x0008: 0x0009), when Bit 7 of is 1,
    the following operation will be selected.

    "Separate handling of FCS errors supported: frames with wrong FCS
    and additional nibble will be counted separately in Forwarded RX Error Counter"

    I would like to make sure which is the correct operating to increase the Forwarded RX Error Counters?

    (a) When the FCS is invalid and the frame attached with additional nibble is received after FCS
    (b) When the FCS is invalid and the frame not attached with additional nibble is received after FCS
    (c) When the FCS is correct and the frame attached with dditional nibble is received after FCS

    I suppose that it is (a), but I need to meka clear.


    Q2.
    When receiving an invalid FCS ECAT frame,
    is it possibility to update the RX data region to accept the datagram part?

    Q3.
    When receiving an invalid FCS ECAT frame,
    is it possibility to send the ECAT frame that updated the working counter to the next port?

    Best regards,
    Kanae

  • 0 in reply to Kanae
    Guru 10085 points
    Hi Garrett,

    Do you have any clue for the difference between the error count numbers in RX Error Counter register
    and the numbers of check sequence error in NetAnalyzer ?

    If you need more information for this matter, please let me know.

    Best regards,
    Kanae
  • 0 in reply to Kanae
    TI__Mastermind 39080 points
    Hi Kanae, Garret is in a business trip. I will jump here. let me update this by tomorrow.

    thank you,
    Paula
  • 0 in reply to Paula Carrillo
    Guru 10085 points

    Hi Paula,

    Thank you for your reply!
    I will wait for your support.

    Best regards,
    Kanae

  • 0 in reply to Kanae
    TI__Mastermind 39080 points

    Hi Kanae, please see answers below

    Q1.

    Regarding ESC Features supported (0x0008: 0x0009), when Bit 7 of is 1,

    the following operation will be selected.

    "Separate handling of FCS errors supported: frames with wrong FCS

    and additional nibble will be counted separately in Forwarded RX Error Counter"

    I would like to make sure which is the correct operating to increase the Forwarded RX Error Counters?

    (a) When the FCS is invalid and the frame attached with additional nibble is received after FCS

    (b) When the FCS is invalid and the frame not attached with additional nibble is received after FCS

    (c) When the FCS is correct and the frame attached with aditional nibble is received after FCS

    PC-- you are right is (a). However, there are some exceptions on how 0x300/0x301/0x302/0x303 are updated compared with ET1100. I will send you additional information in a private message

    Q2.

    When receiving an invalid FCS ECAT frame,

    is it possibility to update the RX data region to accept the datagram part?

    PC-- In case of invalid FCS, RX data memory is updated, but Firmware won't switch buffer pointer and application won't see this data

    Q3.

    When receiving an invalid FCS ECAT frame,

    is it possibility to send the ECAT frame that updated the working counter to the next port?

    PC-- Yes, actually this is the expected behavior as EtherCAT is on the fly protocol.

    Could you please send us more details on the errors counter values seen by Netanalyzer, and also errors seen at 0x300 register?.. just for your information, we have seen a similar behavior (a lot of MII_RX errors) with one faulty Hilscher.

    thank you,

    Paula

  • 0 in reply to Paula Carrillo
    Guru 10085 points
    Hi Paula,

    Thank you for your support!
    I sent a private message to you .
    Please reply it with the additional information.

    Best regards,
    Kanae