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Linux/AM5728: smp_affinity setting error

shigehiro tsuda
Mastermind 9490 points

Part Number: AM5728
Other Parts Discussed in Thread: TPD12S015

Tool/software: Linux

Hi,

Is it possible to allocate GPIO interrupts to specific CPU cores?
If allocation is possible, please tell me how to do it.

Executing the following command results in an error.
USB/MMC etc modules can be changed normally.

179 is an interrupt of gpio.
cat /proc/irq/179/smp_affinity
3
echo 2 > /proc/irq/179/smp_affinity
-sh: echo: write error: Input/output error

Best Regards,
Shigehiro Tsuda

  • 0
    TI__Mastermind 41190 points
    Hi,

    Could you please post the results of the following?
    - Which TI SDK you are using?
    - uname -a
    - cat /proc/interrupts
    - DTS snippet of how the gpio being enabled

    I am able to change the affinity on a gpio int on the TI EVM. The only issue I can think of at the moment is if there is a space between the 2 and the > on the command line.

    Best Regards,
    Schuyler
  • 0 in reply to Schuyler Patton
    Mastermind 9490 points

    Hi Schuyler,

    Thank you for quick reply.
    I use the following environment.

    The answer to your question is below.

    - Which TI SDK you are using? 
    Processor SDK : 5.01.00.11
    evaluation board : AM574x IDK

    - uname -a 
    root@am57xx-evm:~# uname -a
    Linux am57xx-evm 4.14.67-gd315a9bb00 #1 SMP PREEMPT Thu Oct 18 16:36:01 JST 2018 armv7l GNU/Linux

    - cat /proc/interrupts
    root@am57xx-evm:~# cat /proc/interrupts
    CPU0 CPU1
    17: 0 0 CBAR 32 Level gp_timer
    18: 0 0 GICv2 29 Level arch_timer
    19: 13566 6822 GICv2 30 Level arch_timer
    22: 0 0 CBAR 4 Level l3-dbg-irq
    23: 0 0 WUGEN 10 Level l3-app-irq
    25: 1 0 CBAR 232 Level dra7xx-pcie-main
    26: 0 0 CBAR 233 Level dra7-pcie-msi
    27: 1 0 CBAR 121 Level talert
    29: 55 0 CBAR 8 Level omap-dma-engine
    32: 0 0 CBAR 361 Level 43300000.edma_ccint
    34: 0 0 CBAR 359 Level 43300000.edma_ccerrint
    37: 0 0 CBAR 24 Level 4ae10000.gpio
    38: 0 0 CBAR 25 Level 48055000.gpio
    39: 0 0 CBAR 26 Level 48057000.gpio
    40: 0 0 CBAR 27 Level 48059000.gpio
    41: 0 0 CBAR 28 Level 4805b000.gpio
    42: 0 0 CBAR 29 Level 4805d000.gpio
    43: 0 0 CBAR 30 Level 48051000.gpio
    44: 0 0 CBAR 116 Level 48053000.gpio
    45: 627 0 CBAR 69 Level 48020000.serial
    48: 11 0 CBAR 251 Level mbox_ipu1_ipc3x, mbox_dsp1_ipc3x
    52: 41 0 CBAR 255 Level mbox_ipu2_ipc3x, mbox_dsp2_ipc3x
    70: 9 0 CBAR 108 Level omap_dmm_irq_handler
    71: 1035 0 CBAR 51 Level 48070000.i2c
    72: 16366 0 CBAR 78 Level mmc0
    73: 337 0 CBAR 81 Level mmc1
    74: 0 0 CBAR 23 Level 40d01000.mmu
    75: 0 0 CBAR 145 Level 40d02000.mmu
    76: 0 0 CBAR 395 Level 58882000.mmu
    77: 0 0 CBAR 396 Level 55082000.mmu
    80: 0 0 CBAR 49 Level ahci[4a140000.sata]
    81: 0 0 CBAR 217 Level rtc1
    82: 4 0 CBAR 72 Level dwc3-omap
    83: 2 0 CBAR 87 Level dwc3-omap
    85: 0 0 CBAR 335 Level 48484000.ethernet
    86: 0 0 CBAR 336 Level 48484000.ethernet
    89: 346 0 CBAR 16 Level SGX ISR
    94: 0 0 CBAR 46 Level 4b101000.sham
    95: 0 0 CBAR 47 Level 48090000.rng
    96: 0 0 CBAR 354 Level vpe
    97: 0 0 CBAR 146 Level 41501000.mmu
    98: 0 0 CBAR 147 Level 41502000.mmu
    99: 0 0 CBAR 352 Level vip2-s0
    100: 0 0 CBAR 393 Level vip2-s1
    102: 0 0 WUGEN 131 Level arm-pmu
    103: 0 0 WUGEN 132 Level arm-pmu
    104: 1492 0 CBAR 20 Level OMAP DISPC
    105: 0 0 CBAR 96 Level OMAP HDMI
    170: 0 0 4805d000.gpio 16 Level palmas
    171: 0 0 palmas 8 Level 48070000.i2c:tps659038@58:tps659038_rtc
    174: 0 0 PCI-MSI 0 Edge PCIe PME, aerdrv
    175: 0 0 pinctrl 584 Edge 48020000.serial
    176: 0 0 48051000.gpio 12 Edge tpd12s015 hpd
    177: 0 0 4805d000.gpio 27 Edge 4809c000.mmc cd
    178: 21 0 48055000.gpio 19 Edge GPIO Event
    179: 0 0 48057000.gpio 14 Edge edt-ft5506
    180: 0 0 48057000.gpio 16 Edge palmas_usb_id
    182: 0 0 48057000.gpio 26 Edge palmas_usb_vbus
    183: 93 0 CBAR 71 Level xhci-hcd:usb1
    209: 0 0 48057000.gpio 30 Edge 4b2b2400.mdio:00
    210: 0 0 48057000.gpio 31 Edge 4b2b2400.mdio:01
    211: 0 0 4b2a0000.intc 20 Edge eth2
    212: 0 0 4b2a0000.intc 22 Edge eth2
    213: 0 0 4b2a0000.intc 21 Edge eth3
    214: 0 0 4b2a0000.intc 23 Edge eth3
    IPI0: 0 1 CPU wakeup interrupts
    IPI1: 0 0 Timer broadcast interrupts
    IPI2: 3723 7386 Rescheduling interrupts
    IPI3: 311 401 Function call interrupts
    IPI4: 0 0 CPU stop interrupts
    IPI5: 0 0 IRQ work interrupts
    IPI6: 0 0 completion interrupts
    Err: 0

    As a result of checking, touch screen gpio event was supported.

    39:        570          0      CBAR  26 Level     48057000.gpio
    root@am57xx-evm:~# cat /proc/irq/39/smp_affinity
    3
    root@am57xx-evm:~# echo 2 > /proc/irq/39/smp_affinity
    39:        570         90      CBAR  26 Level     48057000.gpio

    root@am57xx-evm:~# echo 2 > /proc/irq/178/smp_affinity
    -sh: echo: write error: Input/output error

    There seems to be a shortage of custom GPIO drivers.
    Could you tell me the procedure to enable smp_affinity?
    Now we do not add smp processing.

    Best Regards,
    Shigehiro Tsuda




  • 0 in reply to shigehiro tsuda
    TI__Mastermind 41190 points
    Hi,
    I was able to reproduce the issue you are reporting of not being able to set the cpu affinity for the IRQ. You may be correct on it could be a driver issue. I will need to research this and I will respond next week on what the reason for error is.

    Best Regards,
    Schuyler