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RTOS/AM5728: DSP delay function

Expert 2990 points

Part Number: AM5728

Tool/software: TI-RTOS

Hi ALL

We want to use TI-RTOS to operate the DSP.

We have develop a GPMC/FPGA driver, Now we need transplant the GPMC/FPGA driver to DSP.

we need a strict timing and a accurate delay.

In the Linux kernel we can use udelay() to delay driver and can use hrtimer as High precision timer.

 So How can we get the udelay()function and the hrtimer in the DSP/RTOS.

The below is our software version

ti-cgt-c6000_8.2.2

bios_6_52_00_12

ipc_3_47_01_00

processor_sdk_rtos_am57xx_4_03_00_05

Thanks

regards

  • Hi,

    In the Linux, the udelay() is a delay in 1us precision. On the C66x DSP side, you can use TCSL and TCSH counter. They are CPU cycle counter, TSCL is the lower 32 bit portion and TSCH is the higher 32 bit portion. In your system, you have the PLL setting for the DSP clock (through GEL, or secondary bootloader). It is most likely DSP runs at 750MHz (you need to double check), that is 1 cycle is 1/0.75 = 1.33 ns. If you delay 750 cycles, that is 1 us delay. 1500 cycles is 2us delay ...

    For the code implementation, you can see below:

    extern volatile unsigned int cregister TSCL;
    TSCL = 1; //enable it, only need to do once

    static uint32_t readTime32(void)
    {
    uint32_t timeVal;

    #if defined (_TMS320C6X)
    timeVal = TSCL;
    #elif __ARM_ARCH_7A__
    __asm__ __volatile__ ("MRC p15, 0, %0, c9, c13, 0\t\n": "=r"(timeVal));
    #else
    /* M4 specific implementation*/
    static uint32_t simuTimer = 0;
    simuTimer++;
    timeVal = simuTimer;
    #endif
    return timeVal;
    }

    void cycleDelay (uint32_t count)
    {
    uint32_t start = (uint32_t)readTime32();

    while (((uint32_t)readTime32() - start) < count);
    }

    If you want to introduce several seconds delay a time, you need to use TSCL and TSCH together. Otherwise, 32-bit TSCL is enough for your purpose.

    Regards, Eric
  • HI Eric
    Thanks for you reply
    It is my answer