Hi,
"The HPI can be used by the host to access the following processor resources:
· HPI configuration registers
· DDR2 Memory Controller configuration register file and memory address ranges
· Power and Sleep Controller (PSC) registers
· PLL0 and PLL1 registers
· ARM internal memory
· CPU internal memory
· VLYNQ remote memory."
But in the document SPRS403B.pdf in the Table 3-3 "Memory Map Summary" (page
24) is not valid connection between "DDR2 Control Registers" and HPI. And in
the Table 3-4 "Configuration Memory Map Summary" (page 25) are many
connections between "CFG Bus Peripherals" and HPI not mentioned in the
SPRUES1.pdf.