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HPI dm6467

Hi,

In the document SPRUES1.pdf is the part 2.2 "Memory Map" (page 8):

"The HPI can be used by the host to access the following processor resources:
· HPI configuration registers
· DDR2 Memory Controller configuration register file and memory address ranges
· Power and Sleep Controller (PSC) registers
· PLL0 and PLL1 registers
· ARM internal memory
· CPU internal memory
· VLYNQ remote memory."

But in the document SPRS403B.pdf in the Table 3-3 "Memory Map Summary" (page
24) is not valid connection between "DDR2 Control Registers" and HPI. And in
the Table 3-4 "Configuration Memory Map Summary" (page 25) are many
connections between "CFG Bus Peripherals" and HPI not mentioned in the
SPRUES1.pdf.
 
So can I have access from HPI to UART or ATA? What document is correct?
  • The connection is physically there between HPI and DDR2 (both registers and data space).  However, that connection is currently not tested/supported.  We will remove the sentence from the HPI guide to make the documentation consistent.

    Bottom line:  the table in the data sheet is the most up-to-date information.  It contains the correct info.  So in summary you can/should NOT use HPI to access the DDR2.  However you CAN use it to access UART and ATA.

  • Hi Brad,

    Can you give a more precise definition to "So in summary you can/should NOT use HPI to access the DDR2"? Do you mean both registers and data space or registers space only, according to Table 3-3 "Memory Map Summary" in SPRS403B.pdf?

  • You should only attempt to access locations in the device with the HPI that have a check box in the HPI column of table 3-3, or table 3-4 for the configuration space (starting at 0x01800000). It looks to me like the DDR2 should be accessable from the HPI, as the actual access range at 0x800000000 is checked for the HPI, which makes sense as this would seem to me to be the most common place for access. What it seems you cannot do with the HPI is access the DDR2 control registers at 0x20000000, so you could not use the HPI to initialize/configure the DDR2 bus (if it is not checked in this table we do not test it, and thus it may not work). As Brad mentions, the datasheet should be the authority in determining what you can and cannot do with the device, as long as you are following table 3-3 you should be in the clear. I hope this helps to clear things up.