Q: What are the pin numbers of the chip selects of Note 1?
Our goal is to get 64MB from each one of CE0, CE1, CE2, CE3
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Q: What are the pin numbers of the chip selects of Note 1?
Our goal is to get 64MB from each one of CE0, CE1, CE2, CE3
Hi Yordan,
Can you please clarify:
The table shows 64MB per CE
Note 1 shows 32MB per CE
Which one is right?
How can I get 64MB from each one of CE0, CE1, CE2, CE3?
The chip has 24-bit addressing and x16 data. 2^24=16M x 2 Bytes = 32MB per CE. Is there a way to get 64MB as per table?
Charilaos Paraskevaidis said:Hi Yordan,
Can you please clarify:
The table shows 64MB per CE
Note 1 shows 32MB per CE
Which one is right?How can I get 64MB from each one of CE0, CE1, CE2, CE3?
The chip has 24-bit addressing and x16 data. 2^24=16M x 2 Bytes = 32MB per CE. Is there a way to get 64MB as per table?
Charilaos -- you have correctly identified the primary limitation, which is the number of EMIF address pins. The only way to get 64MB is if you use a GPIO to manually page between the two halves of memory.
Best regards,
Brad