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RTOS: AM572x SDK RTOS: PDK: CPTS: bug: wrong registers version selected for CPTS on AM572x

siarhei volkau
Prodigy 120 points

Tool/software: TI-RTOS

I am looking into AM57xx PDK and see a misbehavior.

the problem in file pdk_am57xx_1_0_12/packages/ti/csl/cslr_cpts.h

#elif defined(SOC_AM574x) || defined(SOC_AM572x)||defined(SOC_AM571x)

#include <ti/csl/src/ip/cpsw/V3/cslr_cpts.h>

seems like V3 is not correct one (at least for AM572x), but V4 registers match hardware described in TRM (see 24.11.6.7 CPTS registers on page 6758).

  • 0
    TI__Guru** 116170 points

    Thank you for reporting this issue. I have compared the two version with TRM and agree with your analysis but need to work with the design and development team to confirm  whether this is a TRM issue or CSLr issue.

    Based on analysis the contention is in the following registers, all other ones match the spec based on the offsets specified in the document. Do you agree ?

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 120 points
    Good investigation.

    Just want to say, i develop driver for CPTS and it works fine with V4 structure, but you still need analyze TRM/CSLr to fix it, because V4 have registers which not have TRM (i mean RFTCLK_SEL_REG).