AM5728: How to access to DDR3 without using CCS and SD card.

Otsuka,

Are you trying to integrate compiled software for the AM5728 IDK EVM or are you trying to put together software for a custom application that you will run on a customer designed board?  The ProcSDK has example code available for configuring the DDR interfaces for the IDK EVM.  There is no need to port the GEL for this purpose.  However, if you are developing code for a custom board, please refer to the EMIF tool www.ti.com/.../sitara-ddr-config-tool

Tom

Hi Tom

I would like to run the customized BSP for AM5728 on the AM5728 IDK EVM.
This BSP have been ported from other processor for AM572x.
I guess that doing the same procedure with GEL file, be able to write the binary to DDR3.
So I try to write the binary with following procedur.

1. Connect PC and the board with JTAG ICE.
2. Power on the board without uSD card.
3. In other IDE, execute script that configure clock, DDR3, PMIC and so on.
The script procedure and setting value are following GEL file EVM Initialization function.
4. Load the program image to DDR3.

In step 3, I2C congiure register access is error.
So i guess that CCS configures other setting before step3.


Otsuka

Otsuka,

I need to get ProcSDK software integration help for you.  This is not a hardware issue.  Is RTOS based or Linux based?

Tom

Tom,

>This is not a hardware issue.
I think so.
RTOS based.


Otsuka

Otsuka,

The SOC connects to the DDR3 interface using an EMIF1 and EMIF2 Memory Controller and associated PHY settings so before being able to read and write to DDR, you need some software or script that executes on the SOC that initializes the EMIF interface. This can either be a GEL script that is used in debug environment or by creation of a small bootloader code that runs from onchip memory like OCRAM that sets up the EMIF for accessing the DDR memory.

The DDR memory setup is done using two ways in the RTOS development environment:

1. Debugging with CCS IDE and emulator:
In this environment the DDR initialization is done using GEL script. The GEL script is a series of register writes and wait states that configures the EMIF peripheral when developers connect to the core in the debug environment

2. Using SBL boot that uses board library to initialize DDR:
The secondary bootloader is an intermediate secondary level bootloader that SOC ROM software boots that initializes the clocks, pinmux and DDR on the SoC, this can be booted from a SD card or flash to initialize.

Refer to the documentation here:
software-dl.ti.com/.../Foundational_Components.html

If you are using a different IDE, then you can consider using a SD card which is FAT formatted and contains the MLO file for SD boot which will initialize the DDR so you can load and run code on the SOC. Refer to instructions here to boot using SD card:
software-dl.ti.com/.../Foundational_Components.html

Regards,
Rahul

Rahul,

Sorry for late reply.

I have been able to access to DDR with 1st way.

But i encounter a new issue.

After wrote the programe image to 0x80000000 in DDR3, compared programe image binary to DDR memory dump.

Some part of addresses are not matched.

I think that the compared result should be matched.

Attached the compare result. Left data is dumped, right it is the programe image.

I have two question.

1. Is this comapred result correct?

2. If 1st question is No, what the cause do you think?

Regards,

Otsuka