This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

edma3 low level driver problem with interal memory

I am using the EDMA3 low level driver (edma3_lld_01_06_00_01) and DSP/BIOS 5.33.06 with CCS3.3. The examples for the C6474 (examples/edma3_driver/evm6474_*) are working using external memory for both source and destination. I want to transfer data between external (DDR2) to internal memory (IRAM). Thus, I changed _dstBuff1 to the internal memory space by #pragma DATA_SECTION(_dstBuff1, "dintern") and adding dintern  :> IRAM and dextern  :> DDR2 to the command file.

These modifications are working well on the C6455 (examples/edma3_driver/dsk6455) but not on the C6474 examples. With the evm6474_0 example application data transfer from the external to the internal memory and visa versa is not possible; only external to external copies are possible. Please let me know how I can transfer data from the external to the internal memory using EDMA3 LLD.

  • In your linker command file, set the origin address for IRAM to the Global L2 address for the core whose L2 you want the EDMA to access. The Global L2 addresses start at 0x1Z800000 where Z is the core whose L2 you want the EDMA to access. This is true for all bus masters trying to access L2, except for Core Z which can access its own L2 at either the Local L2 address 0x00800000 or the Global L2 address 0x1Z800000.

    We tried to explain this in two places in the datasheet, but it took me a while to find them. Both places are easy to miss.

    1. Section 4.2 Data Switch Fabric (maybe not the most obvious place to look) page 54, the 2nd paragraph's last sentence reads:

    SPRS552g Sec 4.2 p. 54 said:
    Note that any module accessing these particular C64x+ Megamodules ports, including the EDMA, must use the global addresses, not the local addresses.

    2. Section 5.2 Memory Architecture (a good place for this information) bottom of page 60 to top of page 61, this paragraph explains the global and local addresses:

    SPRS552g Sec 2.2 pp. 60-61 said:
    Global addresses that are accessible to all masters in the system are in all memory local to the processors. Additionally, local memory can be accessed directly by the associated processor through aliased addresses, where the eight MSBs are masked to zero. The aliasing is handled within the C64x+ Megamodule and allows for common code to be run unmodified on multiple cores. For example, address location 0x10800000 is the global base address for C64x+ Megamodule Core 0's L2 memory. C64x+ Megamodule Core 0 can access this location by either using 0x10800000 or 0x00800000. Any other master on the device must use 0x10800000 only. Conversely, 0x00800000 can by used by any of the three cores as their own L2 base addresses. For C64x+ Megamodule Core 0, as mentioned this is equivalent to 0x10800000, for C64x+ Megamodule Core 1 this is equivalent to 0x11800000, and for C64x+ Megamodule Core 2 this is equivalent to 0x12800000. Local addresses should only be used for shared code or data, allowing a single image to be included in memory. Any code/data targeted to a specific core, or a memory region allocated during run-time by a particular core should always use the global address only.

    Regards,
    RandyP

     

    If this answers your question, please click the  Verify Answer  button below. If not, please reply back with more information.

  • Thank you!

     

    Regards,

    Christoph Sulzbachner