AM6548: AM65x questions

Hi Barrett,

Some additional responses below.

How is the MCU Island separated?
-The AM6548 is divided into 3 separate domains: Main, MCU, and Wakeup, to facilitate functional partitioning. Chapter 3 of the TRM has a high level overview of the partitioning and how each domain communicates through the CBASS interconnect. There are a number of firewalls as well which can restrict access to/from each domain. 

-When the CBASS firewalls are enabled, internal SPI interfaces may be used to further isolation the MCUSS from the Main for improved freedom from interference.  This make the internal MCUSS solution comparable to an external MCU solution.

How are resources shared (such as CAN)?
-Not sure if you are asking from a h/w or s/w perspective. For hardware, the answer really varies throughout the device. For example, there is the MSMC (Multicore Shared Memory Controller) which handles data traffic control among the many processors and masters in the device. Specific for CAN, there's enough flexibility in the h/w to implement many different schemes, including separate local power control, interrupts, DMA channels, etc. 

-All interfaces are memory mapped so all are visible from any core.

Can 2 CAN masters coexist with this device?
- yes, there are 2 separate CAN controllers in the device

Are there any recommended third parties for SoMs?
Any expectation of SIL certified SoMs?
- Phytec and Mistral will be manufacturing SoMs.  No plans yet for SIL-certified SoMs.

Is there integrated flash memory?
-there is no integrated flash memory

Where does program code reside?
-program code will typically reside in some non-volatile memory (QSPI flash, eMMC), and then boot into DDR.

What does the boot process look like for safety processor?
R5F is booted and configured into dual processor or lock-step mode.  R5F boots the A53 and PRU cores.  R5F can then set firewalls and diagnostics put the device into a safe state.

What does migration from R4F to R5F look like?
-I'm not sure what the R4F reference is. Are you migrating from a different device?

-If referring to Hercules R4F-based MCUs, there is significant similarities.  A migration doc will be available next year for those wanting to move to the internal R5F MCUSS and are familiar with Hercules MCUs.

What potential issues may be encountered during migration?


Will there be any custom driver support?
-We will have driver support in Linux and our Real-Time OS (RTOS)