Hi, in our application we have a DM335 (that’s three-three-five) processor fed by a camera, the VPBE output of this processor is connected via interlaced bt.656 to the VPFE input of a DM355 (that’s three-five-five) processor, which finally drives an LCD display. This all works really well, the video finally ending up on the display is very clear.
We can set the first processor to generate OSD onto the video it sends to the second processor. We have a real time clock hours minutes and seconds written on the first processor’s OSD, and sure enough this gets through the bt.656 to the second processor and finally appears on the LCD, but the problem is whenever the seconds value changes there is visible interlacing of the seconds value in the OSD. There is no interlacing of the video picture onto which the OSD is superimposed. If we record the images using the second processor and play them back frame by frame, we see no interlacing of the video picture but it looks like the odd and even fields of the ‘seconds’ OSD are out of sync, ie. we can freeze a frame in which only the even lines of the OSD have changed to the new clock seconds value (the odd lines are still the previous clock seconds value), then when advancing by one more frame, the odd lines also change to the new clock seconds value. I also tried an experiment - on the second processor (which receives the bt.656 input from the first) I modified the field capture interrupt to deliberately think that ‘even’ frames were ‘odd’ and vice versa. When I did this the video became slurry and appeared like odd and even fields were split across frames – exactly as expected, but the OSD became perfectly in sync – no lagging of fields and instantly updating odd and even lines on every frame. It’s just like on the first processor’s VPBE output the OSD is half a frame out of sync with the video. Could anyone suggest what causes this please, below is a full dump of the first processor’s VPBE registers. Many thanks
Video Encoder/Digital LCD (VENC) Registers at 0x400
VMOD : 1043 VIDCTL : 6000 VDPRO : 0000 SYNCCTL : 4000
HSPLS : 0000 VSPLS : 0000 HINT : 0000 HSTART : 0000
HVALID : 0000 VINT : 0000 VSTART : 0000 VVALID : 0000
HSDLY : 0000 VSDLY : 0000 YCCTL : 0001 RGBCTL : 0000
RGBCLP : FF00 LINECTL : 0000 CULLLINE : 0000 LCDOUT : 0000
BRTS : 0000 BRTW : 0000 ACCTL : 0000 PWMP : 0000
PWMW : 0000 DCLKCTL : 0000 DCLKPTN0 : 0000 DCLKPTN1 : 0000
DCLKPTN2 : 0000 DCLKPTN3 : 0000 DCLKPTN0A: 0000 DCLKPTN1A: 0000
DCLKPTN2A: 0000 DCLKPTN3A: 0000 DCLKHS : 0000 DCLKHSA : 0000
DCLKHR : 0000 DCLKVS : 0000 DCLKVR : 0000 CAPCTL : 0000
CAPDO : 0000 CAPDE : 0000 ATR0 : 0000 ATR1 : 0000
ATR2 : 0000 RSV0 : 0000 VSTAT : 0010 RAMADR : 0000
RAMPORT : 0000 DACTST : 0000 YCOLVL : 0000 SCPROG : 0164
RSV1 : 0000 RSV2 : 0000 RSV3 : 0000 CVBS : 0023
RSV4 : 0000 ETMG0 : 0000 ETMG1 : 0000 RSV5 : 0000
RSV6 : 0000 RSV7 : 0000 RSV8 : 0000 RSV9 : 0000
RSV10 : 0000 RSV11 : 0000 RSV12 : 0000 RSV13 : 0000
RSV14 : 0000 DRGBX0 : 0400 DRGBX1 : 057C DRGBX2 : 0159
DRGBX3 : 02CB DRGBX4 : 06EE VSTARTA : 0000 OSDCLK0 : 0001
OSDCLK1 : 0002 HVLDCL0 : 0000 HVLDCL1 : 0000 OSDHADV : 0000
CLKCTL : 0011 GAMCTL : 0000
On-Screen Display (OSD) Registers at 0x200
MODE : 0000 VIDWINMD : 0303 OSDWIN0MD: 303B OSDATRMD : 8002
RECTCUR : 0000 Reserved : 0000 VIDWIN0OFST: 002D VIDWIN1OFST: 002D
OSDWIN0OFST: 002D OSDWIN1OFST: 000C VIDWIN0ADH: 0602 VIDWIN0ADL: 0000
VIDWIN1ADL: 0000 OSDWINADH: 0431 OSDWIN0ADL: 0000 OSDWIN1ADL: 0000
BASEPX : 007E BASEPY : 0016 VIDWIN0XP: 0000 VIDWIN0YP: 0000
VIDWIN0XL: 02D0 VIDWIN0YL: 0120 VIDWIN1XP: 0000 VIDWIN1YP: 0000
VIDWIN1XL: 02D0 VIDWIN1YL: 0120 OSDWIN0XP: 0000 OSDWIN0YP: 0000
OSDWIN0XL: 02D0 OSDWIN0YL: 0120 OSDWIN1XP: 0000 OSDWIN1YP: 0000
OSDWIN1XL: 02D0 OSDWIN1YL: 0120 CURXP : 0000 CURYP : 0000
CURXL : 0000 CURYL : 0000
W0BMP01 : 0000 W0BMP23 : 0000 W0BMP45 : 0000 W0BMP67 : 0000
W0BMP89 : 0000 W0BMPAB : 0000 W0BMPCD : 0000 W0BMPEF : 0000
W1BMP01 : 0000 W1BMP23 : 0000 W1BMP45 : 0000 W1BMP67 : 0000
W1BMP89 : 0000 W1BMPAB : 0000 W1BMPCD : 0000 W1BMPEF : 0000
VBINDRY : 0000 EXTMODE : 0000 MISCCTL : 00D0 CLUTRAMYCB: 0000
CLUTRAMCR: 0000 TRANSPVALL: 0000 TRANSPVALU: 0000 TRANSPBMPIDX: 0000