Linux/TCI6638K2K: SOC hung while running L1, and L2 application.

Yashavanth K S40

Prodigy 250 points

Part Number: TCI6638K2K

Tool/software: Linux

Hi,

We are using our Custom HW Design based on K2KEVM. it uses SoC TCI6638K2K Silicon Rev 3.1 with MCSDK 3.01.04.07.

We are running LTE L2 and L1 application using TI's syslib_4_00_03_00 package in arm and dsp cores respectively.

The issue we are facing is at some point after the applications are up & running doing the data transfer (> 10 min), the SoC is not responding (console/ethernet not responding) and it seems like all the arm cores freeze and even 3 dsp cores freeze..

- When connected via emulator through CCS, we cannot access (no halt/suspend) the ARM cores (with message "Trouble Halting Target CPU: (Error -1323 @ 0xC001DA88) Device failed to enter debug/halt mode because pipeline is stalled") & DSP cores 0,1,2 (with "Trouble Halting Target CPU: (Error -1202 @ 0x0) Device core is hung.") once the system is hung. We were able to halt/suspend after the applications are up but before the hung state.
- We can access DDR3A by connecting to other 5 dsp cores (where no application is running and not affected).
- We run the application in different data rate, still we face the hung issue.
- We enabled all the debug options available in kernel config (like CONFIG_LOCKUP_DETECTOR, CONFIG_DEBUG_KERNEL, CONFIG_DEBUG_SHIRQ, CONFIG_DETECT_HUNG_TASK etc) still the device went to hung state.
- We are setting the DDR3A_REMAP_EN pin to 1 to use DDR3A from arm view. We shared 1 GB to use for arm and 1GB for dsp application.
- Data flow as below
  .SGMII<->L2(arm)<->L1(dsp)<->Aif2

We are not able to find the root cause for the problems, any help will be appreciated and please let me know if any information needed with respect to our setup...

Thanks & Regards..

over 6 years ago

0 Yashavanth K S40 over 6 years ago

Prodigy 250 points

Hi,
I made some progress but still facing the same issue in longer duration. I change the ddr frequency from 1600 to 1333, now the hang we are able to see after 1 hr before in 1600 the hangs in with 10/ 15 min. is there any problem in my configuration? below is my phy and emif configuration.

ddr configuration wrt 1333:
/* DDR3 PHY configuration data with 1333M rate, and 2GB size */
struct ddr3_phy_config ddr3phy_1333_2g = {
.pllcr = 0x0005C000ul,
.pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK),
.pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)),
.ptr0 = 0x42C21590ul,
.ptr1 = 0xD05612C0ul,
.ptr2 = 0, /* not set in gel */
.ptr3 = 0x0B4515C2ul,
.ptr4 = 0x0A6E08B4ul,
.dcr_mask = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
.dcr_val = ((1 << 10)),
.dtpr0 = 0x8558AA55ul,
.dtpr1 = 0x32857280ul,
.dtpr2 = 0x5002C200ul,
.mr0 = 0x00001A60ul,
.mr1 = 0x00000006ul,
.mr2 = 0x00000010ul,
.dtcr = 0x710035C7ul,
.pgcr2 = 0x00F065B8ul,
.zq0cr1 = 0x0000005Dul,
.zq1cr1 = 0x0000005Bul,
.zq2cr1 = 0x0000005Bul,
.pir_v1 = 0x00000033ul,
.pir_v2 = 0x0000FF81ul,
};

/* DDR3 EMIF configuration data with 1333M rate, and 2GB size */
struct ddr3_emif_config ddr3_1333_2g = {
.sdcfg = 0x62008C62ul,
.sdtim1 = 0x125C8044ul,
.sdtim2 = 0x00001D29ul,
.sdtim3 = 0x32CDFF43ul,
.sdtim4 = 0x543F0ADFul,
.zqcfg = 0x70073200ul,
.sdrfc = 0x00001457ul,
};

ddr configuration wrt 1600:
/* DDR3 PHY configuration data with 1600M rate, and 2GB size */
struct ddr3_phy_config ddr3phy_1600_2g = {
.pllcr = 0x0001C000ul,
.pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK),
.pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)),
.ptr0 = 0x42C21590ul,
.ptr1 = 0xD05612C0ul,
.ptr2 = 0,/*0x00083DEFul,*/ /* not set in gel */
.ptr3 = 0x0D861A80ul,
.ptr4 = 0x0C827100ul,
.dcr_mask = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
.dcr_val = ((1 << 10)),
.dtpr0 = 0x9D9CBB66ul,
.dtpr1 = 0x32868400ul,
.dtpr2 = 0x5002D200ul,
.mr0 = 0x00001C70ul,
.mr1 = 0x00000046ul,
.mr2 = 0x00000018ul,
.dtcr = 0x710035C7ul,
.pgcr2 = 0x00F07A12ul,
.zq0cr1 = 0x0001005Dul,
.zq1cr1 = 0x0001005Bul,
.zq2cr1 = 0x0001005Bul,
.pir_v1 = 0x00000033ul,
.pir_v2 = 0x0000FF81ul,
};

/* DDR3 EMIF configuration data with 1600M rate, and 2GB size */
struct ddr3_emif_config ddr3_1600_2g = {
.sdcfg = 0x6200CE62ul,
.sdtim1 = 0x166C9875ul,
.sdtim2 = 0x00001D4Aul,
.sdtim3 = 0x435DFF53ul,
.sdtim4 = 0x543F0CFFul,
.zqcfg = 0x70073200ul,
.sdrfc = 0x00001869ul,
};

DDR3A is on board chip as like DDR3B in evm.
Part number of ddr memory is AS4C256M16D3A-12BIN

Please help me to solve this issue.

thanks in advance
regards,
yashavanth

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Linux/TCI6638K2K: SOC hung while running L1, and L2 application.