Part Number: TMS320C6748
Hi,
I was wondering if someone could tell me what to consider when choosing the pre-div, multiplier and post-div of the PLL0 because as i see it... I would get the same clock output with many diferent combinations fo those parameters and the clock source frequency.
Could you tell me which ranges should i select or not for each parameter and for the clock source? (for the tms320c6748)
I might be wrong but without a warning of the tool i could make a cpu clock with a higher frequency than the maximun freq specified in the data sheet (456MHz) and i tested and it Works at that freq without problem, so i'm a bit confused. It's the datasheet wrong? It's just the maximun recomendable freq(how restrictive is)? It's not related with the CPU freq?
Sorry for how bad i explain myself.
Thanks in advance,
Juan
