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SPI2 communication problem

MGun
Intellectual 895 points
Other Parts Discussed in Thread: OMAP3530

Hi community

I thought i may post my problem in this forum, since i guess it is WinCE related.
A thread with a similar problem is here: http://e2e.ti.com/support/dsp/omap_applications_processors/f/447/t/73372.aspx

What i did:

Modified the batch build file to add SPI2
WINCE600\PLATFORM\TI_EVM_3530\ti_evm_3530.bat
set BSP_NOSPI2=

Modified platform.c for the correct Mux_Mode
WINCE600\PLATFORM\TI_EVM_3530\SRC\BOOT\XLDR\platform.c

     // MCSPI2 
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_CLK, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_0));    /*MCSPI2_CLK*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_SIMO, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_0));   /*MCSPI2_SIMO*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_SOMI, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_0));   /*MCSPI2_SOMI*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_CS0, (INPUT_DISABLE | PULL_INACTIVE | MUX_MODE_0));   /*MCSPI2_CS0*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_CS1, (INPUT_DISABLE | PULL_INACTIVE | MUX_MODE_0));   /*MCSPI2_CS1*/

For a test, i also enabled the FCLK and ICLK manually for SPI2, didn't solve the problem neither

// Enable SPI2 functional & interface clock
SETREG32(&pPrcmCoreCM->CM_FCLKEN1_CORE, CM_CLKEN_MCSPI2);
SETREG32(&pPrcmCoreCM->CM_ICLKEN1_CORE, CM_CLKEN_MCSPI2);

Checked the oem_pinmux.c for the correct Mux_Mode

 BSP_HSUSB2_12PIN is not defined, so nothing happens.

Dumping the PadConf Registers:

MUX_MODE_0: 0x0
INPUT_ENABLE: 0x100
INPUT_DISABLE: 0x0

CONTROL_PADCONF_MCSPI2_CLK: 0x100
CONTROL_PADCONF_MCSPI2_SIMO: 0x100
CONTROL_PADCONF_MCSPI2_SOMI: 0x100
CONTROL_PADCONF_MCSPI2_CS0: 0x0
CONTROL_PADCONF_MCSPI2_CS1: 0x0

Test code:

HANDLE hContext = SPIOpen(SPI2_DEVICE_NAME);
DWORD channel = 0;
DWORD config = MCSPI_CHCONF_WL(8) | MCSPI_CHCONF_TRM_TXRX | MCSPI_CSPOLARITY_ACTIVELOW | MCSPI_CHCONF_DPE0 | MCSPI_CHCONF_CLKD(32);
SPIConfigure(m_pContext, channel, config);

uint8_t data = 0xAA;
SPIWrite(m_pContext, 1, data);

There is no signal visible when the osciloscope is attached to MCSPI2_CLK or MCSPI2_SIMO or MCSPI2_CS0 when writing with SPIWrite. What did i do wrong?

  • 0
    TI__Expert 4155 points

    Hi,

    Since MCSPI2_CLK and MCSPI_SIMO are set as input signal, are these two signals drived by external devices?

    Could you please elaborate how are the signals probed? Is it on OMAP3530 EVM or customer board?

    Thanks,

    Tao

  • 0 in reply to Tao Zhang
    Intellectual 895 points

    Hi Tao

    I start to believe it's a hardware problem on the evaluation module. It's a Mistral OMAP35xx Evaluation Module.
    P/N: OMAP-EVM-MB-7-0487
    BSP: omapwince_06_15_00

    Basically I followed the existing MCSPI1 pin mapping and copied it for MCSPI2.
    Another thread (Need help on SPI2) explains that is is required to enable the IN bit in the pinmux register of the SPI CLK pin to clock the SPI RX logic.
    Anyway, it's not clear to me why the SIMO pin is input enabled..?

    I changed the pin mapping to the following (disabled input for MCSPI2_SIMO), updated the bootloader but it still does not work.
    WINCE600\PLATFORM\TI_EVM_3530\SRC\BOOT\XLDR\platform.c

    // MCSPI1
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI1_CLK, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_0));

     

     

    /*MCSPI1_CLK*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI1_SIMO, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_0)); /*MCSPI1_SIMO*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI1_SOMI, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_0)); /*MCSPI1_SOMI*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI1_CS0, (INPUT_DISABLE | PULL_INACTIVE | MUX_MODE_0)); /*MCSPI1_CS0*/

     

     

     

     

     // MCSPI2
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_CLK, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_0));    /*MCSPI2_CLK*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_SIMO, (INPUT_DISABLE | PULL_INACTIVE | MUX_MODE_0));   /*MCSPI2_SIMO*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_SOMI, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_0));   /*MCSPI2_SOMI*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_CS0, (INPUT_DISABLE | PULL_INACTIVE | MUX_MODE_0));   /*MCSPI2_CS0*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MCSPI2_CS1, (INPUT_DISABLE | PULL_INACTIVE | MUX_MODE_0));   /*MCSPI2_CS1*/

     

    To exclude the SPI driver, i tried to get a signal (high/low) with the SPI system test mode (MCSPI_SYST) without success:

    PHYSICAL_ADDRESS pa;
    pa.QuadPart = OMAP_MCSPI2_REGS_PA;
    OMAP_MCSPI_REGS *pConfig = reinterpret_cast<OMAP_MCSPI_REGS*>(MmMapIoSpace(pa, sizeof(OMAP_MCSPI_REGS), FALSE));
    // enable system test mode
    SETREG32(&pConfig->MCSPI_MODULCTRL, MCSPI_SYSTEMTEST_BIT);
    // set clock high
    SETREG32(&pConfig->MCSPI_SYST, 1 << 6);
    // set clock low
    SETREG32(&pConfig->MCSPI_SYST, 0 << 6);
    // set CS0 high
    SETREG32(&pConfig->MCSPI_SYST, 1 << 0);
    // set CS0 low
    SETREG32(&pConfig->MCSPI_SYST, 0 << 0);

    Signal probe:

    MCSPI2_CLK MCSPI2_SIMO MCSPI2_CS0
    color red yellow blue
    resolution 1V/div 1V/div 1V/div
    trigger rising edge, 500mV falling edge, 500mV

    Then i changed everything to test the SPI3 (signal also available on the expansion connector)

    ti_evm3530.bat
                set BSP_NOSPI3=

    WINCE600\PLATFORM\TI_EVM_3530\SRC\BOOT\XLDR\platform.c

    OUTREG16(&pConfig->CONTROL_PADCONF_MMC2_CLK,  (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_1));      /*MCSPI3_CLK*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MMC2_CMD,  (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_1));     /*MCSPI3_SIMO*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MMC2_DAT0, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_1));     /*MCSPI3_SOMI*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MMC2_DAT2, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_1));     /*MCSPI3_CS1*/
    OUTREG16(&pConfig->CONTROL_PADCONF_MMC2_DAT3, (INPUT_ENABLE | PULL_INACTIVE | MUX_MODE_1));     /*MCSPI3_CS0*/

    Dump of PinMux Setup:

    MUX_MODE_1: 0x1
    INPUT_ENABLE: 0x100
    INPUT_DISABLE: 0x0

    CONTROL_PADCONF_MMC2_CLK: 0x101
    CONTROL_PADCONF_MMC2_CMD: 0x101
    CONTROL_PADCONF_MMC2_DAT0: 0x101
    CONTROL_PADCONF_MMC2_DAT3: 0x101
    CONTROL_PADCONF_MMC2_DAT2: 0x101

    Executing a simple SPI system test

    PHYSICAL_ADDRESS pa;
    pa.QuadPart = OMAP_MCSPI3_REGS_PA;
    OMAP_MCSPI_REGS *pConfig = reinterpret_cast<OMAP_MCSPI_REGS*>(MmMapIoSpace(pa, sizeof(OMAP_MCSPI_REGS), FALSE));
    // enable system test mode
    SETREG32(&pConfig->MCSPI_MODULCTRL, MCSPI_SYSTEMTEST_BIT);
    // set clock high
    SETREG32(&pConfig->MCSPI_SYST, 1 << 6);
    // set clock low
    SETREG32(&pConfig->MCSPI_SYST, 0 << 6);
    // set CS0 high
    SETREG32(&pConfig->MCSPI_SYST, 1 << 0);
    // set CS0 low
    SETREG32(&pConfig->MCSPI_SYST, 0 << 0);

    And the big surprise: i can see a signal (high/low) on SPI3!

    What could be wrong with the SPI2 on the EVM3530?

  • 0 in reply to MGun
    TI__Expert 4155 points

    Another signal you can check is GPMC_nBE1. When "BSP_EVM2" and "BSP_EVM2_ENHANCED_IO" are enabled in TI_EVM_3530.bat, this signal is configured as GPIO 61.

    When BSP_EVM2_HSUSB_HOST is enabled, GPIO 61 is set to "0", and SPI2 signals are not available on Expansion bus.

    -Tao