Tool/software: Linux
Hello,
We designed a carrier board for Phytec SOM.
Our board has two different PCIex1 connectors where we connect two PCIe-SATA cards (to give access to 4 SSD drives per card)
Both cards links succesfully at PCIe GEN1 and data can be read/written from/to our SSD drives.
However we have an issue with pcie-dra7xx driver (autor Kishon Vijay Abraham, from TI) under 4.14.67 Linux kernel.
When using this function without any modification:
static void dra7xx_pcie_shutdown(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev);
int ret;
dra7xx_pcie_stop_link(dra7xx->pci);
ret = pm_runtime_put_sync(dev);
if (ret < 0)
dev_dbg(dev, "pm_runtime_put_sync failed\n");
pm_runtime_disable(dev);
dra7xx_pcie_disable_phy(dra7xx);
}
sometimes the system hangs and when restarting the system we get a lot of ata/scsi errors and one or both cards are not able to link or they do but disks are not recogniced.
However if we just add a little delay as follows in the mentioned function:
static void dra7xx_pcie_shutdown(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev);
int ret;
dra7xx_pcie_stop_link(dra7xx->pci);
ret = pm_runtime_put_sync(dev);
if (ret < 0)
dev_dbg(dev, "pm_runtime_put_sync failed\n");
msleep(500); // delay
pm_runtime_disable(dev);
msleep(500); // delay
dra7xx_pcie_disable_phy(dra7xx);
}
we do not longer get any problems. Does anyone know the relation between this delay and identification/communication problems over the PCIe link?
How can the previous close affect the next boot? After a reboot (where global power has been restarted) everything should start from scrach. However at some point (PCIe cards?, PMIC?...) a previous state seems to be stored.
Has the PMIC any influence in the identification and communication over PCIe? The PMIC we are using is the one embeded in Phytec SOM so that we haven't made any changes.
Hope you can help me. Thank you in advance.
Regards,
