Hello,
As you can see in the picture below the data (read/write) address busses are 24 bit wide, while from spru317f we know that these busses are 23-bit wide which is suitable for addressing 8 M*16-bit words of data.
So again I think this is another mistake in datasheets of TMS320VC5507 and TMS320VC5509A where the block digram of device is shown.
Regards,
Hossein
Hi Hossein,
You are correct. Thanks for raising this issue.
I am linking this post to a similar post you created: http://e2e.ti.com/support/processors/f/791/p/638965/2386022
I have filed more LitBugs against these four lit numbers to have this block diagram fixed in the next version:
SPRS244J (TMS320VC5507), SPRS613 (SM320VC5507-EP), SPRS205K (TMS320VC5509A), SPRS163H (TMS320VC5509, out of production?)
SPRU371F explains the 23-bit address for Data Write/Read Address Bus (16-bit word addressable) and the 24-bit Program Address Bus (8-bit byte addressable).
3.1 Memory Map
All 16M bytes of memory are addressable as program space or data space (see Figure 3-1). When the CPU uses program space to read program code from memory, it uses 24-bit addresses to reference bytes. When your program accesses data space, it uses 23-bit addresses to reference 16-bit words. In both cases, the address buses carry 24-bit values, but during a data-space access, the least significant bit on the address bus is forced to 0.
3.2 Program Space
3.2.1 Byte Addresses (24 Bits)
When the CPU fetches instructions from program memory, it uses byte addresses, which are addresses assigned to individual bytes. These addresses are 24 bits wide. Figure 3-2 shows a row of 32-bit-wide memory. Each byte is assigned an address. For example, byte 0 is at address 00 0100h and byte 2 is at address 00 0102h.
3.3 Data Space
3.3.1 Word Addresses (23 Bits)
When the CPU accesses data space, it uses word addresses, which are addresses assigned to individual 16-bit words. These addresses are 23 bits wide. Figure 3-4 shows a row of 32-bit-wide memory. Each word is assigned an address. Word 0 is at address 00 0100h and word 1 is at address 00 0101h.
The corrected image should appear as below:
Regards,
Mark
[EDIT - fixed remaining data address busses in block diagram]
