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RTOS/AM5728: McSPI issue while using two chip selects on same bus

Part Number: AM5728
Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI-RTOS

Hi,

I am using  PROCESSOR-SDK-RTOS-AM57X - pdk_am57xx_1_0_7.

Here, over McSPI bus 4, I have two different devices at CS0 and CS1 respectively.

I am not able to configure and use the devices at the same time. Right now I am opening individual channel, doing the transaction and closing it.

Since it is McSPI, is it possible to configure and open the Channels and leave them open for further use?

Also, other strange observation is when I am having transaction over CS0, CS1 also seems to be going down and vice-versa.

Here is the snippet of the configuration :

SPI_v1_HWAttrs spi_cfg;
SPI_Params spiParams;

if (spi_bus_handle_st[bus_no][chip_select].spi_handle != NULL)
{
return;
}

SPI_socGetInitCfg(bus_no, &spi_cfg);

spi_cfg.chNum = chip_select;  /* CS0 & CS1 respectively */

spi_cfg.chMode = MCSPI_SINGLE_CH;

spi_cfg.enableIntr = true;

spi_cfg.initDelay = MCSPI_INITDLY_0;

spi_cfg.chnCfg[spi_cfg.chNum].dataLineCommMode = MCSPI_DATA_LINE_COMM_MODE_1;

spi_cfg.chnCfg[spi_cfg.chNum].tcs = MCSPI_CH0CONF_TCS0_ZEROCYCLEDLY;

spi_cfg.chnCfg[spi_cfg.chNum].csPolarity = MCSPI_CS_POL_LOW;

spi_cfg.chnCfg[spi_cfg.chNum].trMode =  MCSPI_TX_RX_MODE;

spi_cfg.rxTrigLvl = MCSPI_RX_TX_FIFO_SIZE;

spi_cfg.txTrigLvl = MCSPI_RX_TX_FIFO_SIZE;

spi_cfg.edmaHandle = NULL;

spi_cfg.dmaMode = false;

SPI_socSetInitCfg(bus_no, &spi_cfg);

spiParams = spi_bus_params_st[bus_no].spi_user_params[chip_select];

spi_bus_handle_st[bus_no][chip_select].spi_handle = SPI_open(bus_no, &spiParams);

Thanks & Regards,

Raksha

  • Hi,

    We have the MCSPI test example for AM57x, software-dl.ti.com/.../Device_Drivers.html
    section 6.7.8. MCSPI

    The MCSPI instance supports up to 4 channels via CS. The driver API extern MCSPI_Handle MCSPI_open(uint32_t index, uint32_t channel, MCSPI_Params *params) also supports different channels. So, it should work if you use CS0 and CS1 and keep both channel opens. We also have the MCSPI master/slave test between two boards, the test is single channel test due to the EVM limitation. The HW attribute is given under pdk_am57xx_1_0_12\packages\ti\drv\spi\soc\am572x\spi_soc.c. This includes the MCSPI instance property and 4 channels properties.

    I looked your configuration, it looks OK. I saw you used MODE_1, is this what you want to test?

    /**
    * \brief Communication on Data line pins is configured as :
    * Data line 0 (SPIDAT[0]) selected for reception
    * Data line 1 (SPIDAT[1]) selected for transmission
    * No transmission on Data Line 0 (SPIDAT[0])
    */
    #define MCSPI_DATA_LINE_COMM_MODE_1 (((uint32_t) MCSPI_CH0CONF_IS_LINE0 << \
    MCSPI_CH0CONF_IS_SHIFT) | \
    ((uint32_t) MCSPI_CH0CONF_DPE1_ENABLED << \
    MCSPI_CH0CONF_DPE1_SHIFT) | \
    ((uint32_t) MCSPI_CH0CONF_DPE0_DISABLED \
    << MCSPI_CH0CONF_DPE0_SHIFT))

    Also, you used SPI_open(bus_no, &spiParams); Are you able to try the latest Processor SDK RTOS 5.1 release and use MCSPI_open API?

    Regards, Eric
  • Hi Eric,

    I tried with MCSPI_open and MCSPI_transfer APIs, it is not making any difference.

    MODE_1 is fine, since individually both the slave devices are working.

    Also, you didn`t mention anything about both CSs going low, regardless of whichever slave line I am configuring. Can you check this from your end? 

    Thanks & Regards,

    Raksha

  • Hi Raksha, let me jump here. Are you still facing the issue? if so, in order to reproduce it please let me know what is the best way to do it.

    thank you,
    Paula
  • Hi Paula,

    Yes, I am still facing this issue.

    As suggested in previous reply, I tried with multichannel SPI test present in pdk_am57xx_1_0_7/packages/ti/drv/spi/test/src/main_mcspi_test.c. I am modifying it to test out multiple channel in the same bus in non-dma interrupt mode. "spi_test_multiple_channel"  seems to be be getting interrupt only for whichever channel is configured first. Remaining channel are not getting interrupt. Individually all channels are getting interrupt, so interrupt configuration is also correct.

    Can you try out this experiment on your side and confirm this?

    Thanks & Regards,
    Raksha

  • Hi Raksha, back from vacations. Could you please share with me your modified main_mcspi_test.c.? well, if possible even better the complete CCS project and some quick instructions on how you test it in order to speed up..

    Also, just wondering if you have tried latest TI-RTOS PSDK 

    PSDK v5.2 includes PDK 1.0.12. PDK 1.0.7 is a little bit old.

    thank you! and happy new year!
    Paula

  • Hi Raksha, wondering if you can share modified project, or if you were able to resolve the issue.

    thank you,
    Paula
  • Hi Paula,

    I don`t have the project with me and the problem still remains.

    But for me, I am not using both slave devices at the same time. So, I am just pinmuxing one line as driver off while using another and vice versa.

    But there is something else I am facing with mcspi, if you can check from your side that will be helpful.

    There is mcspiLoopback with am572x as pdk example, which is on SPI_BUS 1, that it is working fine. 

    But I was trying same with SPI_BUS 3  loopback, then I am not receiving back all the values correctly.

    Note: this is digital loopback with no slave involved.

    I am attaching the example here. It will be really helpful if you can see it from your end.

    Thanks & Regards,

    Raksha

    1401.MCSPI_BasicLoopbackExample.zip

  • Hi Raksha, please help me to align in versions. Are you using PDK 1.0.7 or 1.0.12?. I think is pdk_am57xx_1_0_12. But, if so, I don't see mcspi_test_evmAm572x.cfg.

    Could you point me from where you got *.cfg? or if you modified, could you share it here?. Main idea is to build/run the closest OOB demo, and then build/run yours in order to reproduce the issue.

    thank you,

    Paula

  • Hi Paula,

    I am using pdk_am57xx_1_0_7 and the .cfg file is modified by taking "ti/drv/spi/test/am572x/c66/bios/spi_test_idkAM572x.cfg" as example. Here, is the modified .cfg  :

     ================ General configuration ================ */
    var Memory                      =   xdc.useModule('xdc.runtime.Memory');
    var BIOS                        =   xdc.useModule('ti.sysbios.BIOS');
    var HeapMem                     =   xdc.useModule('ti.sysbios.heaps.HeapMem');
    var HeapBuf                     =   xdc.useModule('ti.sysbios.heaps.HeapBuf');
    var Log                         =   xdc.useModule('xdc.runtime.Log');
    var Task                        =   xdc.useModule('ti.sysbios.knl.Task');
    var Semaphore                   =   xdc.useModule('ti.sysbios.knl.Semaphore');
    var Hwi                     = xdc.useModule('ti.sysbios.family.c64p.Hwi');
    var ECM       =   xdc.useModule('ti.sysbios.family.c64p.EventCombiner');
    var IntXbar   = xdc.useModule('ti.sysbios.family.shared.vayu.IntXbar');
    var core      = xdc.useModule('ti.sysbios.hal.Core');
    var halCache  = xdc.useModule('ti.sysbios.hal.Cache');
    var Cache     = xdc.useModule('ti.sysbios.family.c66.Cache');
    var System                      =   xdc.useModule('xdc.runtime.System');
    SysStd                          =   xdc.useModule('xdc.runtime.SysStd');
    System.SupportProxy             =   SysStd;

    /* Create a default system heap using ti.bios.HeapMem. */
    var heapMemParams1              =   new HeapMem.Params;
    heapMemParams1.size             =   8192 * 25;
    heapMemParams1.sectionName      =   "systemHeap";
    Program.global.heap0            =   HeapMem.create(heapMemParams1);

    /* This is the default memory heap. */
    Memory.defaultHeapInstance      =   Program.global.heap0;
    Program.sectMap["systemHeap"]   =   Program.platform.stackMemory;

    ECM.eventGroupHwiNum[0] = 7;
    ECM.eventGroupHwiNum[1] = 8;
    ECM.eventGroupHwiNum[2] = 9;
    ECM.eventGroupHwiNum[3] = 10;

    /*
     * Enable Event Groups here and registering of ISR for specific GEM INTC is done
     * using EventCombiner_dispatchPlug() and Hwi_eventMap() APIs
     */
    var exception     = xdc.useModule('ti.sysbios.family.c64p.Exception');
    exception.enablePrint = true;

    /* ================ BIOS configuration ================ */

    var BIOS                        =   xdc.useModule('ti.sysbios.BIOS');

    /* Enable BIOS Task Scheduler */
    BIOS.taskEnabled      =   true;

    /* ================ Task configuration ================ */

    /* No runtime stack checking is performed */
    Task.checkStackFlag = false;

    /* Reduce the number of task priorities */
    Task.numPriorities = 4;

    /* Define and add one Task Hook Set */
    Task.addHookSet({
      registerFxn: '&TaskRegisterId',
      switchFxn: '&mySwitch',
    });

    /* ================ Driver configuration ================ */

    var Edma          = xdc.loadPackage ("ti.sdo.edma3.drv.sample");
    var drv           = xdc.loadPackage ("ti.sdo.edma3.drv");
    var rm            = xdc.loadPackage ("ti.sdo.edma3.rm");

    /* Load the OSAL package */
    var osType = "tirtos"
    var Osal = xdc.useModule('ti.osal.Settings');
    Osal.osType = osType;

    /*use CSL package*/
    var socType           = "am572x";
    var Csl = xdc.loadPackage('ti.csl');
    Csl.Settings.deviceType = socType;

    /* Load Profiling package */
    var Utils = xdc.loadPackage('ti.utils.profiling');

    /* Load the uart package */
    var Uart = xdc.loadPackage('ti.drv.uart');
    Uart.Settings.enableProfiling = true;

    /* Load the gpio package */
    var socType          = "am572x";
    var Gpio = xdc.loadPackage('ti.drv.gpio');

    /* Load the I2C package */
    var socType           = "am572x";
    var I2c = xdc.loadPackage('ti.drv.i2c');
    I2c.Settings.socType = socType;

    /* Load the SPI package */
    var Spi = xdc.loadPackage('ti.drv.spi');

    /* Load the Board package and set the board name */
    var Board = xdc.loadPackage('ti.board');
    Board.Settings.boardName = "evmAM572x";

    /* ================ Memory sections configuration ================ */
    Program.sectMap[".text"] = "EXT_RAM";
    Program.sectMap[".const"] = "EXT_RAM";
    Program.sectMap[".plt"] = "EXT_RAM";
    Program.sectMap["BOARD_IO_DELAY_DATA"] = "OCMC_RAM1";
    Program.sectMap["BOARD_IO_DELAY_CODE"] = "OCMC_RAM1";

    Thanks & Regards,

    Raksha

  • Raksha,

    We reached out to SPI LLD developer to clarify the support for multiple CS. Here is the response from the SPI driver developer:

    Multi-channel mode is supported in the Proc-SDK, but due to the h/w limitation, we only tested one channel case. You may refer to the master/slave example for details. By default, the driver sets the channel in single channel mode (chMode = MCSPI_SINGLE_CH in SPI_v1_HWAttrs). The example should use SPI_socSetInitCfg() API to change it to MCSPI_MULTI_CH in multi channel mode.

    the current example in the PDK that we support (SPI LLD master-slave example) has a multichannel test doesn`t set MCSPI_MULTI_CH mode in the SOC configuration . The example seems to open multiple handles in single channel mode and test transactions on each channel so what we are testing is not multichannel mode but single channel mode operation using different channels.

    Regards,

    Rahul