Other Parts Discussed in Thread: AM4372
Tool/software: Linux
My board is reference gp_evm, but there is no EEPROM, no SD card
am437x-evm-linux-sdk-src-05.00.00.15
The kernel did not make any changes ，the dts
made some modifications
Kernel image @ 0x82000000 [ 0x000000 - 0x3ad200 ]
## Flattened Device Tree blob at 88000000
Booting using the fdt blob at 0x88000000
Loading Device Tree to 8fff0000, end 8ffff029 ... OK
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.14.40-g4796173fc5 (root@Ge-machine) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #1 PREEMPT Sun Dec 23 15:23:11 CST 2018
[ 0.000000] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] OF: fdt: Machine model: TI AM437x GP EVM
[ 0.000000] earlycon: omap8250 at MMIO 0x44e09000 (options '')
[ 0.000000] bootconsole [omap8250] enabled
[ 0.000000] Memory policy: Data cache writeback
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: UEFI not found.
[ 0.000000] cma: Reserved 48 MiB at 0xfcc00000
[ 0.000000] CPU: All CPU(s) started in SVC mode.
[ 0.000000] AM437x ES1.2 (sgx neon)
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 522559
[ 0.000000] Kernel command line: console=ttyS0,115200n8 root=/dev/mtdblock1 rootfstype=jffs2 earlycon
[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Memory: 2015596K/2097148K available (8192K kernel code, 328K rwdata, 2444K rodata, 1024K init, 276K bss, 32400K reserved, 49152K cma-reserved, 1261564K highmem)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)
[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
[ 0.000000] .text : 0xc0008000 - 0xc0900000 (9184 kB)
[ 0.000000] .init : 0xc0c00000 - 0xc0d00000 (1024 kB)
[ 0.000000] .data : 0xc0d00000 - 0xc0d52210 ( 329 kB)
[ 0.000000] .bss : 0xc0d52210 - 0xc0d9748c ( 277 kB)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] Tasks RCU enabled.
[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[ 0.000000] L2C: platform modifies aux control register: 0x0e030000 -> 0x3e430000
[ 0.000000] L2C: DT/platform modifies aux control register: 0x0e030000 -> 0x3e430000
[ 0.000000] L2C-310 enabling early BRESP for Cortex-A9
[ 0.000000] OMAP L2C310: ROM does not support power control setting
[ 0.000000] L2C-310 dynamic clock gating disabled, standby mode disabled
[ 0.000000] L2C-310 cache controller enabled, 16 ways, 256 kB
[ 0.000000] L2C-310: CACHE_ID 0x410000c9, AUX_CTRL 0x4e430000
[ 0.000000] OMAP clockevent source: timer2 at 24000000 Hz
[ 0.000012] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[ 0.008107] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[ 0.017630] OMAP clocksource: timer1 at 24000000 Hz
[ 0.023037] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns
[ 0.033281] OMAP clocksource: 32k_counter at 32768 Hz
[ 0.038909] Console: colour dummy device 80x30
[ 0.043551] Calibrating delay loop... 1993.93 BogoMIPS (lpj=9969664)
[ 0.109390] pid_max: default: 32768 minimum: 301
[ 0.114308] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.121155] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.129112] CPU: Testing write buffer coherency: ok
[ 0.134833] Setting up static identity map for 0x80100000 - 0x80100060
[ 0.141697] Hierarchical SRCU implementation.
[ 0.146511] EFI services will not be available.
[ 0.152163] devtmpfs: initialized
[ 0.163758] random: get_random_u32 called from bucket_table_alloc+0x8c/0x1ac with crng_init=0
[ 0.172995] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[ 0.181187] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.191386] futex hash table entries: 256 (order: -1, 3072 bytes)
[ 0.200954] pinctrl core: initialized pinctrl subsystem
[ 0.207095] DMI not present or invalid.
[ 0.211437] NET: Registered protocol family 16
[ 0.217582] DMA: preallocated 256 KiB pool for atomic coherent allocations
[ 0.294611] Unhandled fault: imprecise external abort (0x1406) at 0x00000000
[ 0.301901] pgd = c0004000
[ 0.304690] [00000000] *pgd=00000000
[ 0.308386] Internal error: : 1406 [#1] PREEMPT ARM
[ 0.313420] Modules linked in:
[ 0.316575] CPU: 0 PID: 1 Comm: swapper Not tainted 4.14.40-g4796173fc5 #1
[ 0.323673] Hardware name: Generic AM43 (Flattened Device Tree)
[ 0.329783] task: ee858000 task.stack: ee856000
[ 0.334468] PC is at _get_clkdm+0x4/0x50
[ 0.338517] LR is at _enable_sysc+0x60/0x248
[ 0.342921] pc : [<c011af00>] lr : [<c011b594>] psr: 40000053
[ 0.349389] sp : ee857e40 ip : ee857e40 fp : ee857e6c
[ 0.354780] r10: c0d52240 r9 : 000000d3 r8 : c0c3c820
[ 0.360171] r7 : c0d0cd7c r6 : c0d5278c r5 : 00000020 r4 : c0d0c828
[ 0.366909] r3 : c0d0d324 r2 : 00000000 r1 : c0d0d304 r0 : c0d0c828
[ 0.373649] Flags: nZcv IRQs on FIQs off Mode SVC_32 ISA ARM Segment none
[ 0.381106] Control: 10c53c7d Table: 80004059 DAC: 00000051
[ 0.387036] Process swapper (pid: 1, stack limit = 0xee856208)
[ 0.393056] Stack: (0xee857e40 to 0xee858000)
[ 0.397555] 7e40: c0d09528 00000000 ee857e6c 00000000 c0124dc8 c0d0c828 00000000 c0d5278c
[ 0.406002] 7e60: ee857e94 ee857e70 c011b8c4 c011b540 c0d0c828 c0d0b52c c0d0c828 c0d0c858
[ 0.414448] 7e80: c0d0c86c c0d52240 ee857ec4 ee857e98 c0c0b230 c011b788 ee857ec4 ee857ea8
[ 0.422894] 7ea0: c011a45c 00000011 c0d085b8 c0d0c828 c0d08610 c0c0b64c ee857edc ee857ec8
[ 0.431339] 7ec0: c0c0b740 c0c0b16c ffffe000 00000000 ee857f4c ee857ee0 c01019e4 c0c0b658
[ 0.439785] 7ee0: ee857f4c ee857ef0 c0147800 c0c00624 c0a970a8 c0a97088 c0a970d4 c0aa1284
[ 0.448231] 7f00: 00000000 c0a97060 00000002 00000002 c0a8e10c c0b61a44 efffec3c 00000000
[ 0.456676] 7f20: 00000000 c0b61a44 00000003 c0b61a44 c0c4ddac 00000003 c0d52240 c0c3c820
[ 0.465122] 7f40: ee857f94 ee857f50 c0c00eb4 c01019a4 00000002 00000002 00000000 c0c00618
[ 0.473567] 7f60: 55555555 c0c00618 55555555 00000000 c0841c78 00000000 00000000 00000000
[ 0.482013] 7f80: 00000000 00000000 ee857fac ee857f98 c0841c88 c0c00d78 00000000 c0841c78
[ 0.490458] 7fa0: 00000000 ee857fb0 c0107e68 c0841c84 00000000 00000000 00000000 00000000
[ 0.498903] 7fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 0.507349] 7fe0: 00000000 00000000 00000000 00000000 00000013 00000000 55555555 55555555
[ 0.515790] Backtrace:
[ 0.518317] [<c011b534>] (_enable_sysc) from [<c011b8c4>] (_enable+0x148/0x284)
[ 0.525865] r6:c0d5278c r5:00000000 r4:c0d0c828
[ 0.530639] [<c011b77c>] (_enable) from [<c0c0b230>] (_setup.part.12+0xd0/0x404)
[ 0.538276] r7:c0d52240 r6:c0d0c86c r5:c0d0c858 r4:c0d0c828
[ 0.544121] [<c0c0b160>] (_setup.part.12) from [<c0c0b740>] (__omap_hwmod_setup_all+0xf4/0x108)
[ 0.553103] r6:c0c0b64c r5:c0d08610 r4:c0d0c828
[ 0.557874] [<c0c0b64c>] (__omap_hwmod_setup_all) from [<c01019e4>] (do_one_initcall+0x4c/0x170)
[ 0.566945] r5:00000000 r4:ffffe000
[ 0.570642] [<c0101998>] (do_one_initcall) from [<c0c00eb4>] (kernel_init_freeable+0x148/0x1e4)
[ 0.579626] r8:c0c3c820 r7:c0d52240 r6:00000003 r5:c0c4ddac r4:c0b61a44
[ 0.586555] [<c0c00d6c>] (kernel_init_freeable) from [<c0841c88>] (kernel_init+0x10/0x110)
[ 0.595090] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0841c78
[ 0.603174] r4:00000000
[ 0.605792] [<c0841c78>] (kernel_init) from [<c0107e68>] (ret_from_fork+0x14/0x2c)
[ 0.613607] r5:c0841c78 r4:00000000
[ 0.617297] Code: e16f0f10 e1a002a0 e89da8f0 e1a0c00d (e92dd830)
[ 0.623601] ---[ end trace 1eeb79dd9f92aabb ]---
[ 0.628420] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[ 0.628420]
[ 0.637859] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[ 0.637859]
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* AM437x GP EVM */
/dts-v1/;
#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "TI AM437x GP EVM";
compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
aliases {
};
chosen {
stdout-path = &uart0;
};
evm_v3_3d: fixedregulator-v3_3d {
compatible = "regulator-fixed";
regulator-name = "evm_v3_3d";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
};
vtt_fixed: fixedregulator-vtt {
compatible = "regulator-fixed";
regulator-name = "vtt_fixed";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
};
vmmcwl_fixed: fixedregulator-mmcwl {
compatible = "regulator-fixed";
regulator-name = "vmmcwl_fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
matrix_keypad: matrix_keypad0 {
compatible = "gpio-matrix-keypad";
debounce-delay-ms = <5>;
col-scan-delay-us = <2>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&matrix_keypad_default>;
pinctrl-1 = <&matrix_keypad_sleep>;
linux,wakeup;
row-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* Bank0, pin3 */
&gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
&gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
&gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
linux,keymap = <0x00000201 /* P1 */
0x00010202 /* P2 */
0x01000067 /* UP */
0x0101006a /* RIGHT */
0x02000069 /* LEFT */
0x0201006c>; /* DOWN */
};
/* fixed 12MHz oscillator */
refclk: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <12000000>;
};
/* fixed 32k external oscillator clock */
clk_32k_rtc: clk_32k_rtc {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
};
sound0: sound0 {
compatible = "simple-audio-card";
simple-audio-card,name = "AM437x-GP-EVM";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line In";
simple-audio-card,routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In",
"LINE1R", "Line In";
simple-audio-card,format = "dsp_b";
simple-audio-card,bitclock-master = <&sound0_master>;
simple-audio-card,frame-master = <&sound0_master>;
simple-audio-card,bitclock-inversion;
simple-audio-card,cpu {
sound-dai = <&mcasp1>;
system-clock-frequency = <12000000>;
};
sound0_master: simple-audio-card,codec {
sound-dai = <&tlv320aic3106>;
system-clock-frequency = <12000000>;
};
};
beeper: beeper {
compatible = "gpio-beeper";
pinctrl-names = "default";
pinctrl-0 = <&beeper_pins_default>;
pinctrl-1 = <&beeper_pins_sleep>;
gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
};
audio_mstrclk: mclk_osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12000000>;
};
};
&am43xx_pinmux {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default &unused_pins &debugss_pins>;
pinctrl-1 = <&wlan_pins_sleep>;
ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
pinctrl-single,pins = <
0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
>;
};
i2c0_pins: i2c0_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: i2c1_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
pixcir_ts_pins: pixcir_ts_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7) /* spi2_d0.gpio3_22 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */
AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */
AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
display_mux_pins: display_mux_pins {
pinctrl-single,pins = <
/* GPIO 5_8 to select LCD / HDMI */
AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
>;
};
dcan0_default: dcan0_default_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
>;
};
dcan0_sleep: dcan0_sleep_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
>;
};
dcan1_default: dcan1_default_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */
AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
>;
};
dcan1_sleep: dcan1_sleep_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_rxd.gpio0_14 */
AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_txd.gpio0_15 */
>;
};
mmc3_pins_default: pinmux_mmc3_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a1.mmc2_dat0 */
AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a2.mmc2_dat1 */
AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a3.mmc2_dat2 */
AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be1n.mmc2_dat3 */
>;
};
mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_clk.mmc2_clk */
AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn3.mmc2_cmd */
AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a1.mmc2_dat0 */
AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a2.mmc2_dat1 */
AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.mmc2_dat2 */
AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_be1n.mmc2_dat3 */
>;
};
wlan_pins_default: pinmux_wlan_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
>;
};
wlan_pins_sleep: pinmux_wlan_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
>;
};
uart3_pins: uart3_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0) /* uart3_rxd.uart3_rxd */
AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_ctsn.uart3_ctsn */
AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
>;
};
mcasp1_pins: mcasp1_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
>;
};
mcasp1_sleep_pins: mcasp1_sleep_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
gpio0_pins: gpio0_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
>;
};
emmc_pins_default: emmc_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
>;
};
emmc_pins_sleep: emmc_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
>;
};
beeper_pins_default: beeper_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_field.gpio4_12 */
>;
};
beeper_pins_sleep: beeper_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x9e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam1_field.gpio4_12 */
>;
};
unused_pins: unused_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa3c, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
AM4372_IOPAD(0xa40, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa44, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa48, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa4c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa50, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa54, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
AM4372_IOPAD(0xa58, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa60, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa70, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa78, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa7c, PIN_INPUT | PULL_DISABLE)
AM4372_IOPAD(0xac8, PIN_INPUT_PULLDOWN)
AM4372_IOPAD(0xad4, PIN_INPUT_PULLDOWN)
AM4372_IOPAD(0xad8, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xadc, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xae0, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xae4, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xae8, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xaec, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xaf0, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xaf4, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xaf8, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xafc, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xb00, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xb04, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xb08, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xb0c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xb10, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xb14, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xb18, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
debugss_pins: pinmux_debugss_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0xa90, PIN_INPUT_PULLDOWN)
AM4372_IOPAD(0xa94, PIN_INPUT_PULLDOWN)
AM4372_IOPAD(0xa98, PIN_INPUT_PULLDOWN)
AM4372_IOPAD(0xa9c, PIN_INPUT_PULLDOWN)
AM4372_IOPAD(0xaa0, PIN_INPUT_PULLDOWN)
AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN)
AM4372_IOPAD(0xaa8, PIN_INPUT_PULLDOWN)
>;
};
uart0_pins_default: uart0_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
uart0_pins_sleep: uart0_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_ctsn.uart0_ctsn */
AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_rtsn.uart0_rtsn */
AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
qspi_pins_default: qspi_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0xa14, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
AM4372_IOPAD(0xa10, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn3.qspi_clk */
AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
>;
};
qspi_pins_sleep: qspi_pins_sleep{
pinctrl-single,pins = <
AM4372_IOPAD(0xa14, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa10, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa18, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa1c, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa20, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xa24, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
matrix_keypad_default: matrix_keypad_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)
AM4372_IOPAD(0x9a8, PIN_OUTPUT | MUX_MODE7)
AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
>;
};
matrix_keypad_sleep: matrix_keypad_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x9a4, PULL_UP | MUX_MODE7)
AM4372_IOPAD(0x9a8, PULL_UP | MUX_MODE7)
AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
>;
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <100000>;
tps65218: tps65218@24 {
reg = <0x24>;
compatible = "ti,tps65218";
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
interrupt-controller;
#interrupt-cells = <2>;
dcdc1: regulator-dcdc1 {
regulator-name = "vdd_core";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <1144000>;
regulator-boot-on;
regulator-always-on;
};
dcdc2: regulator-dcdc2 {
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <1378000>;
regulator-boot-on;
regulator-always-on;
};
dcdc3: regulator-dcdc3 {
regulator-name = "vdcdc3";
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
regulator-state-disk {
regulator-off-in-suspend;
};
};
dcdc5: regulator-dcdc5 {
regulator-name = "v1_0bat";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
dcdc6: regulator-dcdc6 {
regulator-name = "v1_8bat";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo1: regulator-ldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
pixcir_ts@5c {
compatible = "pixcir,pixcir_tangoc";
pinctrl-names = "default";
pinctrl-0 = <&pixcir_ts_pins>;
reg = <0x5c>;
attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
/*
* 0x264 represents the offset of padconf register of
* gpio3_22 from am43xx_pinmux base.
*/
interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
<&am43xx_pinmux 0x264>;
interrupt-names = "tsc", "wakeup";
touchscreen-size-x = <1024>;
touchscreen-size-y = <600>;
wakeup-source;
};
tlv320aic3106: tlv320aic3106@1b {
#sound-dai-cells = <0>;
compatible = "ti,tlv320aic3106";
reg = <0x1b>;
status = "okay";
/* Regulators */
IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> <tps63031> EN: V1_8D -> VBAT */
AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */
};
};
&epwmss0 {
status = "okay";
};
&ecap0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
&gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_pins>;
status = "okay";
p23 {
gpio-hog;
gpios = <23 GPIO_ACTIVE_HIGH>;
/* SelEMMCorNAND selects between eMMC and NAND:
* Low: NAND
* High: eMMC
* When changing this line make sure the newly
* selected device node is enabled and the previously
* selected device node is disabled.
*/
output-low;
line-name = "SelEMMCorNAND";
};
};
&gpio1 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&gpio4 {
status = "okay";
};
&gpio5 {
pinctrl-names = "default";
pinctrl-0 = <&display_mux_pins>;
status = "okay";
ti,no-reset-on-init;
p8 {
/*
* SelLCDorHDMI selects between display and audio paths:
* Low: HDMI display with audio via HDMI
* High: LCD display with analog audio via aic3111 codec
*/
gpio-hog;
gpios = <8 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "SelLCDorHDMI";
};
};
&mmc1 {
status = "disabled";
vmmc-supply = <&evm_v3_3d>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
/* eMMC sits on mmc2 */
&mmc2 {
/*
* When enabling eMMC, disable GPMC/NAND and set
* SelEMMCorNAND to output-high
*/
status = "disabled";
vmmc-supply = <&evm_v3_3d>;
bus-width = <8>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&emmc_pins_default>;
pinctrl-1 = <&emmc_pins_sleep>;
ti,non-removable;
};
&mmc3 {
status = "disabled";
/* these are on the crossbar and are outlined in the
xbar-event-map element */
dmas = <&edma_xbar 30 0 1>,
<&edma_xbar 31 0 2>;
dma-names = "tx", "rx";
vmmc-supply = <&vmmcwl_fixed>;
bus-width = <4>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mmc3_pins_default>;
pinctrl-1 = <&mmc3_pins_sleep>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@0 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio1>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
};
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&usb2_phy1 {
status = "okay";
};
&usb1 {
dr_mode = "otg";
status = "okay";
};
&usb2_phy2 {
status = "okay";
};
&usb2 {
dr_mode = "host";
status = "okay";
};
&mac {
slaves = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "rgmii";
};
&elm {
status = "okay";
};
&uart0 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart0_pins_default>;
pinctrl-1 = <&uart0_pins_sleep>;
};
&dcan0 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&dcan0_default>;
pinctrl-1 = <&dcan0_sleep>;
status = "disabled";
};
&dcan1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&dcan1_default>;
pinctrl-1 = <&dcan1_sleep>;
status = "disabled";
};
&mcasp1 {
#sound-dai-cells = <0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mcasp1_pins>;
pinctrl-1 = <&mcasp1_sleep_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
/* 4 serializers */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0 0 1 2
>;
tx-num-evt = <32>;
rx-num-evt = <32>;
};
&qspi {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_pins_default>;
pinctrl-1 = <&qspi_pins_sleep>;
spi-max-frequency = <48000000>;
m25p80@0 {
compatible = "mx66l51235l", "spi-flash";
spi-max-frequency = <48000000>;
reg = <0>;
spi-cpol;
spi-cpha;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
/*
* MTD partition table. The ROM checks the first 512KiB for a
* valid file to boot(XIP).
*/
partition@0 {
label = "QSPI.U_BOOT";
reg = <0x00000000 0x000080000>;
};
partition@1 {
label = "QSPI.U_BOOT.backup";
reg = <0x00080000 0x00080000>;
};
partition@2 {
label = "QSPI.U-BOOT-SPL_OS";
reg = <0x00100000 0x00010000>;
};
partition@3 {
label = "QSPI.U_BOOT_ENV";
reg = <0x00110000 0x00010000>;
};
partition@4 {
label = "QSPI.U-BOOT-ENV.backup";
reg = <0x00120000 0x00010000>;
};
partition@5 {
label = "QSPI.KERNEL";
reg = <0x00130000 0x0800000>;
};
partition@6 {
label = "QSPI.FILESYSTEM";
reg = <0x00930000 0x36D0000>;
};
};
};
&rtc {
clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
clock-names = "ext-clk", "int-clk";
status = "okay";
};
&cpu {
cpu0-supply = <&dcdc2>;
};
&wkup_m3_ipc {
ti,set-io-isolation;
ti,scale-data-fw = "am43x-evm-scale-data.bin";
};
&pruss_soc_bus {
status = "okay";
pruss1: pruss@0 {
status = "okay";
};
pruss0: pruss@40000 {
status = "okay";
};
};
&wdt {
status = "okay";
};
&sgx {
status = "okay";
};
