Hello,
While probing the MCU_MDIO0_MDC and MCU_MDIO0_MDIO signals (at ball L1 and L4), I noticed that they were being driven at 1.8V on the AM65x EVM.
According to the datasheet, these signals are both powered by the VDDSHV0_WKUP domain (which corresponds to balls U8, V7, W8, and Y7). Looking at the EVM schematic, the VDDSHV0_WKUP pins are powered by 3.3V. Based on the datasheet I would assume the MCU_MDIO0 signals would then be driven at 3.3V, which matches the schematic labeling convention of "MCU_MDC_RGMII_3V3" and "MCU_MDIO_3V3".
However, these MDIO signals are consistently driven at 1.8V before the voltage translating buffers. I came across this issue in our own design, and this prevented communication with the ethernet phy since we used a different buffer scheme to translate 3.3V to 1.8V.
Are these signals actually driven by another domain, or maybe the MDIO module internally regulates the power? Maybe just a typo in the documentation? Please advise. We just want to make sure we revise our design appropriately to workaround this.
Thank you,
John Feuerstein