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RTOS/TDA2EVM5777: RTOS appImage stop at "Jumping to MPU CPU0 App" after load image files

Part Number: TDA2EVM5777

Tool/software: TI-RTOS

Dear TI,

As described in the title,this is the detail information:

TDA2xx SBL Boot

DPLL Configuration Completed

Clock Domain Configuration Completed

Module Enable Configuration Completed

TI EVM PAD Config Completed

DDR Config Completed

App Image Download Begins

SD Boot - file open completed successfully

MPU CPU0 Image Load Completed

IPU1 CPU0 Image Load Completed

IPU1 CPU1 Image Load Completed

IPU2 CPU0 and CPU1 Image Load Completed

DSP1 Image Load Completed

DSP2 Image Load Completed

EVE1 Image Load Completed

EVE2 Image Load Completed

EVE3 Image Load Completed

EVE4 Image Load Completed

App Image Download Completed

Putting MPU CPU1 in Off mode

EVE MMU configuration completed

EVE MMU configuration completed

EVE MMU configuration completed

EVE MMU configuration completed

*****************************************************************

PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles

SBL Initial Config Cycles - 144493 (12.33 ms)
SOC Init Cycles - 170871 (14.58 ms)
DDR Config Clock Cycles - 43431 (3.70 ms)
App Image Load Cycles - 83283797 (7106.88 ms)
Slave Core Bootup Cycles - 208040 (17.75 ms)
SBL Boot-up Cycles - 83851696 (7155.34 ms)
Time at which SBL started IPU1_0 - 244625 (20.87 ms)
*****************************************************************

Jumping to MPU CPU0 App:

                 What caused this is I add the following code in function 'System_initLinks(void)' in file links_fw\src\rtos\links_common\system\system_initDeinitLinks.c

#ifdef links_ipu_TDACom
   TDAComLink_init();
#endif

After i comment this code , app can startup normally: ------Question 1: What can i do to fix this , how should i init my own links?


EVE MMU configuration completed

*****************************************************************

PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles

SBL Initial Config Cycles - 144503 (12.33 ms)
SOC Init Cycles - 170849 (14.57 ms)
DDR Config Clock Cycles - 43501 (3.71 ms)
App Image Load Cycles - 83074015 (7088.98 ms)
Slave Core Bootup Cycles - 207924 (17.74 ms)
SBL Boot-up Cycles - 83641855 (7137.43 ms)
Time at which SBL started IPU1_0 - 244139 (20.83 ms)
*****************************************************************

Jumping to MPU CPU0 App                                                 ------Question 2: In my view, SBL is running in A15(MPU), and then jump tu main() in A15. But why it looks like start from IPU1-0 from the log  '[IPU1-0]'. 
[IPU1-0] 7.452601 s: [IPU_primary_core_init_312]             ------Question 3: I get this by add 'vps_printf()' in funciton 'IPU_primary_core_init(void)' in file  links_fw\src\rtos\bios_app_common\tda2xx\ipu1-0\src\ipu_primary.c

                                                                                                                          But i also add another two lines debug code in the same function. And i cannot find the output in my console. All the debug lines have no relationships with the code context.
[IPU1-0] 7.452693 s: ***** IPU1_0 Firmware build time 19:45:07 Jan 10 2019
[IPU1-0] 7.452845 s: *** SYSTEM: CPU Frequency <ORG = 212800000 Hz>, <NEW = 212800000 Hz>
[IPU1-0] 7.531690 s: [main_107]                                        ------Question 4: I get this by add 'vps_printf()' in funciton 'main(void)' in file  apps\src\common\main_app\tda2xx\a15_0\src\main_a15_0.c

                                                                                                                         How could i can this debug info at this position. 

                                                                                                                                   ------Why did  not it shown as the first debug line follow 'Jumping to MPU CPU0 App '?

                                                                                                                                   ------Why did not it start with ‘[HOST]’ but '[IPU1-0]'?
[IPU1-0] 8.249374 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15...
[IPU1-0] 8.249588 s: SYSTEM: Notify register to [IPU2] line 0, event 15...
[IPU1-0] 8.249710 s: SYSTEM: Notify register to [DSP1] line 0, event 15...
[IPU1-0] 8.249801 s: SYSTEM: Notify register to [DSP2] line 0, event 15...
[IPU1-0] 8.249923 s: SYSTEM: Notify register to [EVE1] line 0, event 15...
[IPU1-0] 8.250015 s: SYSTEM: Notify register to [EVE2] line 0, event 15...
[IPU1-0] 8.250137 s: SYSTEM: Notify register to [EVE3] line 0, event 15...
[IPU1-0] 8.250259 s: SYSTEM: Notify register to [EVE4] line 0, event 15...
[IPU1-0] 8.250381 s: SYSTEM: Notify register to [HOST] line 0, event 15...
[IPU1-0] 8.252180 s: *** UTILS: CPU MHz = 20 Mhz ***
[IPU1-0] 8.252333 s: SYSTEM: System Common Init in progress !!!



Note:
1. TDAComLink is my private link created as ipu2 link.
2. PROCESSOR VISION SDK release version:3.5
3. Any other info if you need, let me known.

Regards,
Liu Gan



  • Hi Liu Gan,

    can you check chapter "3.7 Initializing link" in vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_DevelopmentGuide.pdf and make sure you initialize the new link in correct way?
    Also can you try to see what causes the issue inside your TDAComLink_init() function?

    Regards,
    Yordan
  • Hi Liu,

    In addition to what Yordan said, answers to other questions are given below:
    2. Jumping to MPU CPU0 App is last print from SBL which is running on A15. In Vision SDK IPU1_0 is primary core and hence you see IPU1_0 first.
    3. Please share the code snippet that is not working.
    4. Same answer as 2.

    Regards,
    Rishabh
  • Hi Yordan,

    I reviewd my initialization code & the development guide doc. But i didn't find any quetionable code, which may lead to this problem.I am just not quite sure about the definition of 'SYSTEM_LINK_ID_TDACom'.

    I define it as follow:

    typedef  enum
    {
        SYSTEM_LINK_ID_TDACom_0    =
                        IPU2_LINK((uint32_t)SYSTEM_LINK_COMMON_LINKS_MAX_ID+1U),
        SYSTEM_LINK_ID_TDACom_1    =
                        IPU2_LINK((uint32_t)SYSTEM_LINK_COMMON_LINKS_MAX_ID+2U),
        SYSTEM_LINK_ID_TDACom_2    =
                        IPU2_LINK((uint32_t)SYSTEM_LINK_COMMON_LINKS_MAX_ID+3U)
    }SYSTEM_IPU2_LINK_IDS;  

    My init func & related variables:

    #define TDACom_LINK_OBJ_MAX    (3U)
    #define TDACom_LINK_TSK_STACK_SIZE      (SYSTEM_DEFAULT_TSK_STACK_SIZE)
    
    
    #pragma DATA_ALIGN(gTDAComLink_tskStack, 32)
    #pragma DATA_SECTION(gTDAComLink_tskStack, ".bss:taskStackSection")
    UInt8 gTDAComLink_tskStack[TDACom_LINK_OBJ_MAX][TDACom_LINK_TSK_STACK_SIZE];
    
    TDAComLink_Obj gTDAComLink_obj[TDACom_LINK_OBJ_MAX];
    
    Int32 TDAComLink_init(void)
    {
        Int32 status;
        System_LinkObj linkObj;
        UInt32 tdaComId;
        TDAComLink_Obj *pObj;
        UInt32 procId = System_getSelfProcId();
    
        Vps_printf("[%s_%d]\n", __FUNCTION__, __LINE__);
    
        for (tdaComId = 0; tdaComId < TDACom_LINK_OBJ_MAX; tdaComId++)
        {
            pObj = &gTDAComLink_obj[tdaComId];
    
            memset(pObj, 0, sizeof(*pObj));
    
            pObj->tskId = SYSTEM_MAKE_LINK_ID(procId,
                                              SYSTEM_LINK_ID_TDACom_0 + tdaComId);        
            memset(&linkObj, 0, sizeof(linkObj));
            linkObj.pTsk = &pObj->tsk;
            linkObj.linkGetFullBuffers= NULL;
            linkObj.linkPutEmptyBuffers= NULL;
            linkObj.getLinkInfo = NULL;
    
            System_registerLink(pObj->tskId, &linkObj);
    
            snprintf(pObj->name, 32U, "TDACom%d  ", (UInt32)tdaComId);
    
            status = Utils_tskCreate(&pObj->tsk,
                                     TDAComLink_tskMain,
                                     TDACom_LINK_TSK_PRI,
                                     gTDAComLink_tskStack[tdaComId],
                                     TDACom_LINK_TSK_STACK_SIZE, pObj, pObj->name,
                                     UTILS_TSK_AFFINITY_CORE0);
            UTILS_assert(status == SYSTEM_LINK_STATUS_SOK);
        }
        Vps_printf("[%s_%d]\n", __FUNCTION__, __LINE__);
        return status;
    }

    Regards,

    Liu Gan

  • Hi Rishabh,

       My IPU_primary_core_init function code:

         Line 276 & line 288 are the two lines that i think show output log to console.

       SBL code context:

    /* Jump to MPU CPU0's entry point */
        if (0U != sblEntryPoints.entryPoint[SBLLIB_CORE_ID_MPU_CPU0])
        {
            SBLLibPrintf(SBLLIB_TRACE_LEVEL_IMP_INFO,
                         "\n Jumping to MPU CPU0 App \n");
            UARTWaitUntilTransmitComplete();
            mpuCore0EntryFuncPtr =
                (EntryFuncPtr_t) (sblEntryPoints.entryPoint[
                                      SBLLIB_CORE_ID_MPU_CPU0]);
            mpuCore0EntryFuncPtr();
        }
        else
        {
    #ifndef SBL_DEV_BUILD
            SBLLibPrintf(SBLLIB_TRACE_LEVEL_IMP_INFO,
                         "\n Putting MPU in Retention... \n");
    
            MPU_WUGEN_0_DisableAll();
    
            PMHALPdmSetPDState(PMHAL_PRCM_PD_MPU,
                               PMHAL_PRCM_PD_STATE_RETENTION,
                               PM_TIMEOUT_NOWAIT);
            PMHALPdmSetLogicRetState(PMHAL_PRCM_PD_MPU,
                                     PMHAL_PRCM_PD_RET_STATUS_CSWR);
    
            PMHALPdmSetMemRetState(PMHAL_PRCM_PD_MPU,
                                   PMHAL_PRCM_PHY_MEM_MPU_L2,
                                   PMHAL_BANK_RET_ON);
            PMHALCMSetCdClockMode(PMHAL_PRCM_CD_MPU,
                                  PMHAL_PRCM_CD_CLKTRNMODES_HW_AUTO,
                                  PM_TIMEOUT_NOWAIT);
    
            PMLIBCpuIdle(PMHAL_PRCM_PD_STATE_RETENTION);
    #else
            volatile uint32_t spin = 1U;
            while (spin) ;
    #endif
        }

       From which, i think mpuCore0EntryFuncPtr is the pointer to main() in A15, hence the log info should also start from '[HOST]' cpu.

       So i am still so clear of the mening of primary cpu. In my point of view, it's the core which perform app start and management, but not the starting cpu.

  • Hi Yordan, 

    I resolved this problem. By define my own TDACom link, i mean to run it in IPU2, hence i defined the linkID as above mentioned.

    But i am wrong in write the file 'vision_sdk/links_fw/src/rtos/links_ipu/TDACom/component.mk'.

    I modify the line

    $(MODNAME)_$(SOC)_CORELIST = $(CORE_LIST_ALL)

    to 

    $(MODNAME)_$(SOC)_CORELIST = $(IPU_SECONDARY_CORE)

    then the app starts normally.

    Regards,

    Liu Gan

  • Hi Liu Gan,

    Kindly mark the relevant posts as "This resolved my issue" and close the thread.
    For any further questions kindly start a new thread.

    Regards,
    Rishabh
  • Hi Rishabh,

    Sorry,but i am still confused about the startup sequence of RTOS apps.
    Can you kindly share me some more details about this topic.

    Regards,
    Liu Gan
  • Hi Liu,

    Can you please look at processors.wiki.ti.com/.../TDA_SBL_UserGuide.pdf

    Regards,
    Rishabh
  • Hi Rishabh,

    I have learned both SBL doc and code. I am now familiar with the app load process.
    What i want to know is the app startup sequence, which may starts from per processor's main function to chains_main function, after the SBL phase.

    Are there any related docs or wiki links?
    If no, you can close the thread and i will spend more time reviewing the related code.

    Regards,
    Liu Gan
  • Hi Liu,

    Unfortunately we don't have any documentation.
    Below is brief on start sequence:
    All CPUs run to main once started by SBL.
    IPU1_0 initializes the remote prints.
    Then each CPU initializes their local links.
    After that BIOS is started and IPC handshake occurs between different CPUs.
    Hope it helps.

    Regards,
    Rishabh
  • Hi,

    I haven't heard back from you, I'm assuming you were able to resolve your issue.
    If not, just post a reply below (or create a new thread if the thread has locked due to time-out).

    Regards,
    Rishabh