Part Number: AM5728
Hi,
I know there are some rules need to be followed for proper GPMC operation.
http://processors.wiki.ti.com/index.php/Tips_for_configuring_Sitara_GPMC_registers
In TRM section 15.4.4.9.1, there is another rule.
It says;
“To ensure a correct duty cycle of GPMC_CLK between accesses, RDCYCLETIME and WRCYCLETIME are expressed in GPMC_FCLK cycles and must be multiples of the GPMC_CLK cycle.”
AM5728 TRM:
http://www.ti.com/lit/ug/spruhz6k/spruhz6k.pdf
Does this also need to be followed?
Thanks and regards,
KoT