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RTOS/AM5728: Can L1D SRAM be used to section data into it

Shaunak Shilimkan
Intellectual 610 points
Part Number: AM5728

Tool/software: TI-RTOS

Hi,

I understand that the L1D SRAM on the DSPs is being used by TI-RTOS for caching data. Can I section memory in L1D and use it to store my own data?

Regards,

Shaunak

  • 0
    TI__Guru** 116170 points
    This question has been asked and answered on the E2E forums in the following posts:
    e2e.ti.com/.../425058
    e2e.ti.com/.../743711
    e2e.ti.com/.../266788

    the above discussion may be for C674x DSP but the same also applies to the C66x DSP architecture that is available on AM57x. Please understand the implication of converting L1D cache to SRAM before making this decision. All data access other than the data that is in L1D will slow down and could result in net result of lower performance for an TI RTOS application that is running from DDR or onchip shared memory.

    Regards,
    Rahul