Other Parts Discussed in Thread: OMAPL138
I'm currently using processor_sdk_rtos_omapl138_5_01_00_11 on the DSP side of an OMAP L138 and have this code:
void dspEdma3EnableInterrupts(void) {
*INTMUX3 = (*INTMUX3 & 0xFFFFFF00) | EDMA3_0_CC0_INT1; // maps INT12 to EDMA_0_CC0_INT1
edma3_hwi_handle = Hwi_create(12, dspEdma3Isr, NULL, NULL);
WHICH_EDMA3[IESR] = (1 << PARAM_SLOT_START); // NB, per sprugp9b pg 112, we cannot write IER directly!
Hwi_enableInterrupt(12);
}
void dspEdma3Disable(void) { // call AFTER dspMcaspDisable()!
Edma3Param *start = (Edma3Param *) &(WHICH_EDMA3[PARAM(PARAM_SLOT_START)]);
memset(start, 0, sizeof(Edma3Param));
WHICH_EDMA3[EECR] = (1 << PARAM_SLOT_START); // NB, sprugp9b, pg 110, cannot write EER directly;
Hwi_delete(&edma3_hwi_handle);
Hwi_disableInterrupt(12);
}
I'm trying to shed the RTOS. I need to replace all the Hwi_* functions.
What is the equivalent bare metal way to do this?
I suspect what I need to know is (a) where in memory the interrupt vector table is and (b) how to enable/disable the interrupt.
I found the CSR.GIE and IER, so that's good. Can I write them directly? I'm assuming yes.
I found the ISTP, but it points at 0x00700000, which is the L2ROM, so I suspect I need to move it in to RAM.
How do I write to the ISTP from C?
It looks like i need 0x20 bytes * 16 entries == 0x200 bytes. But what goes here? It should be executable instructions? Does it need to be aligned in any way? I'm assuming yes, and 4 bytes.
Looking at the existing entries, they all seem different, so I'm not sure what a generic entry would look like. Maybe sprufe8b.pdf or sprui04b.pdf can help me...
I'm not a DSP assembly guru, so I'm a little lost at this point...