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CCS/TMS320C6455: C6455 Booting

SURABHI RAKESH
Intellectual 330 points
Part Number: TMS320C6455

Tool/software: Code Composer Studio

HI,

I have configured DSP as EMIFA boot mode.

The code works fine when loaded through emulator,

But when the same is converted to hex and loaded through external flash,DSP is not booting up.

While debugging I have found that DSP is not coming out of transferring the code from flash to L2RAM.

It is also observed that value of core register of CPU that holds the size of the section(according to secondary boot loader register B0),has a huge value (0xFFC100000).

This problem occurs only when the .text section size exceeds 0x13000.

May I know is there any restriction on size of the section?

Thanks in advance.

Regards,

Rakesh.

  • 0
    TI__Guru*** 125430 points
    Sounds like an issue with the bootloader. You should try some of the tips mentioned here for debug:

    processors.wiki.ti.com/.../Debugging_Boot_Issues

    Can you see the improper value get loaded by stepping through that code? Can you post a snippet of the instructions and/or code that is responsible for loading that code? I suspect it relates to possibly either the data types used to define some of the variables and/or the addressing mode used by the compiler (or is this assembly code?).
  • 0 in reply to Brad Griffis
    Intellectual 330 points

    HI,

    I have attatched the secondary bootloader code.

                .title  "Flash bootup utility for 6455 dsp"
                .option D,T
                .length 102
                .width  140
    COPY_TABLE    .equ    0xb0000400
                .sect ".boot_load"
                .global _boot
    _boot:      
    ;************************************************************************
    ;* Debug Loop -  Comment out B for Normal Operation
    ;************************************************************************
                zero B1
    _myloop:  ; [!B1] B _myloop  
                nop  5
    _myloopend: nop
    ;************************************************************************
    ;* Configure EMIF
    ;************************************************************************
    ;****************************************************************************
    ;* Copy code sections
    ;****************************************************************************
            mvkl  COPY_TABLE, a3   ; load table pointer
            mvkh  COPY_TABLE, a3
            ldw   *a3++, b1        ; Load entry point
    copy_section_top:
            ldw   *a3++, b0        ; byte count 
            ldw   *a3++, a4        ; ram start address
            nop   3
     [!b0]  b copy_done            ; have we copied all sections?
            nop   5
    copy_loop:
            ldb   *a3++,b5
            sub   b0,1,b0          ; decrement counter
     [ b0]  b     copy_loop        ; setup branch if not done
     [!b0]  b     copy_section_top
            zero  a1
     [!b0]  and   3,a3,a1
            stb   b5,*a4++
     [!b0]  and   -4,a3,a5         ; round address up to next multiple of 4
     [ a1]  add   4,a5,a3          ; round address up to next multiple of 4
    ;****************************************************************************
    ;* Jump to entry point
    ;****************************************************************************
    copy_done:
            b    .S2 b1
            nop   5
    Regards,
    Rakesh
  • 0 in reply to SURABHI RAKESH
    TI__Guru*** 125430 points

    It's not clear to me what the issue is.  You'll need to step through the code to look for the point in time where things seem to go wrong.

  • 0 in reply to Brad Griffis
    Intellectual 330 points
    Hi,
    I am facing the issue when the .text section size exceeds 0x14000 .

    While debugging ,I have noticed that core register value B0 has a value 0xFFFC0000,
    That's the reason DSP is not booting.

    Regards,
    Rakesh
  • 0 in reply to SURABHI RAKESH
    TI__Guru*** 125430 points

    That looks like it is being sign extended for some reason.

    1. Does it get loaded as that value directly from memory?  In other words, what instruction executes where it receives that value?  Are you certain it's the "load" instruction and not happening perhaps later during  a subtract, etc.?  Have you verified by stepping through the code?
    2. If it is happening when it is loaded from external memory, can you check your flash to see if somehow the value in the flash is 0xFFFC0000 in this case, i.e. the issue could possibly exist in the tooling for creating your flash image.

  • 0 in reply to Brad Griffis
    Intellectual 330 points
    Hi,
    I have verified my flash image, the flash image doesn't contain that value instead it holds the actual section size value.
    The value of core register is because of the subtract instruction in the secondary bootloader code.

    Infact I am using the same tool for creating the flash image,where I could able to boot if the .text section size is not exceeding 0x14000.

    Regards,
    Rakesh.
  • 0 in reply to SURABHI RAKESH
    TI__Guru*** 125430 points

    Try changing “sub” to “subu”.

  • 0 in reply to Brad Griffis
    Intellectual 330 points

    Hi,

    I have tried changing to "subu",but I am getting the following errors.

  • 0 in reply to SURABHI RAKESH
    TI__Guru*** 125430 points

    Go back to your original code and try changing these two lines:

            sub   b0,1,b0          ; decrement counter
     [ b0]  b     copy_loop        ; setup branch if not done
    Those two instructions can be replaced by this one:
     [ b0]  bdec     copy_loop, b0        ; setup branch if not done
  • 0 in reply to Brad Griffis
    Intellectual 330 points
    Hi,
    I tried by replacing those instructions.
    Still DSP is not booting.

    Regards,
    Rakesh
  • 0 in reply to SURABHI RAKESH
    Intellectual 330 points
    Hi,

    Even by replacing those instructions,
    DSP is not booting.

    Regards,
    Rakesh
  • 0 in reply to SURABHI RAKESH
    TI__Guru*** 125430 points

    Please post two screenshots:

    1. The instruction before the register value turns to an unexpected value.
    2. The instruction after the register value turns to an unexpected value.

    Each screenshot needs to contain the disassembly window as well as the CPU register window.  I want to be able to see the precise opcode in the disassembly window as well as how all the registers change when the instruction is executed.

  • 0 in reply to Brad Griffis
    Intellectual 330 points
    Hi,

    Thanks for your quick response.
    I have found that my writing into the flash itself is not correct.

    I have exported the data, what is written into the flash and compared with the hex file that need to be loaded, and found that only certain number of bytes(91064) are written. The other bytes are with the erased value of flash i.e 0xFF. This is the reason why core register value(B0),holds such a huge value.

    So the code greater than the above bytes are not getting booted while the other does.

    Do u have any restriction on the number of bytes to be written at once to flash through DSP?

    Regards,
    Rakesh
  • 0 in reply to SURABHI RAKESH
    TI__Guru*** 125430 points

    I'm not aware of any such restrictions.  You will need to debug the flashing utility to better understand how it fails.