RTOS: AM5728 IPU issue

jinjinjin

Intellectual 480 points

Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI-RTOS

IPU1 has two CPUs.

Can theoretically implement a CPU to run a SYSBIOS?

If so, how does the interrupt vector table handle it?

Whether the IPU interrupt vector table address must be 0x00000000？

over 6 years ago

0 Garrett Ding over 6 years ago

TI__Mastermind 43296 points

Hi,

IPU does support SYS/BIOS, and there are plenty of SYS/BIOS example provided in Processor SDK - www.ti.com/.../PROCESSOR-SDK-AM57X

You can refer to the example, e.g. GPIO_LedBlink_evmAM572x_m4TestProject to find out how an interrupt ISR is set up.

IPU interrupt vector is put from 0x0000_0400.

Regards,
Garrett

0 jinjinjin over 6 years ago in reply to Garrett Ding

Intellectual 480 points

NO, I can run a SYSBIOS in SMP mode on both cores of IPU1.

I want to ask if I can run one sysbios on one core.

Is the meaning of IPU1 running two sysbios