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AM5718: S/w Shut down/Reset implementation for SR2.0 AM5718

Rakesh Muralidharan
Expert 2810 points
Part Number: AM5718
Other Parts Discussed in Thread: TMDXIDK5718, , TMDSEVM572X, TPS659037

Hi,

 I have ""TMDXIDK5718"" evm for AM5718. As i understand if i adopt the reset implementation as in reference design I will not be able to implement software shutdown ie Power down the PMIC.

I will be using following PMIC : TPS6590379

Processor SR 2.0

My requirement is to implement

1. automatic power ON

2. s/w Reset

3. s/w Shutdown

Watchdog reset SoC when s/w become non responsive.

How to implement all these schemes to Hardware?? Do you provide any reference design??

If an external BMC provided then how to implement software shutdown scheme. Do you provide any documentation for this??

  • 0
    TI__Guru**** 393215 points
    Hi,

    Please read AM571x Errata Advisories i862 (check Workaround Implementation 2), i727, i729.
  • 0 in reply to Biser Gatchev-XID
    Expert 2810 points

    In case of implementation 2 booltloader (SBL) should be able to hold PMIC from entering into reset.

    We have limited experience in manipulating/tinkering with uBoot.

    As I understand implementation 1 has following side-effects/risks

    1. No software shutdown

    2.eMMC contention

    In case of software shutdown

    If i try to emulate software shutdown using a BMC (ie BMC asserting PWRON to turn OFF) i guess shut down can be implemented. Is there any means to know that PMIC TPS6590379 turned OFF??

    Automatic Turn ON i guess can be implemented by connecting PWRON to VRTC_OUT.

    Will the above method work

    In case of eMMC (i863) contention

    What if i connect sysboot15 = 0 and pull up the eMMC signals as needed.?? What is the drawback of this technique ??

     

  • 0 in reply to Rakesh Muralidharan
    TI__Mastermind 46460 points

    Rakesh,

    The eMMC contention issue is resolved by properly configuring SYSBOOT15 on SR2.x devices.  This is not a problem for you since SR1.0 devices are no longer available.

    The AM571x IDK implements the POWERHOLD on the PMIC.  This results in an 'always-on' configuration that cannot be shut-off by software.  This is same as the PMIC implementation on the AM572x IDK.  However, the AM572x GP EVM implements Implementation 2 of the workaround for Advisory i862.  You can download the files from http://www.ti.com/tool/tmdsevm572x  It contains a pulse generator circuit on sheet 8 between RSTOUTn and PORz that guarantees all reset initiators generate a PORz.  This solution does not preclude a software shut-down.

    Also, you mention wanting to shut down the PMIC and AM7518 processor from a BMC.  The BMC will need to drive into the logic controlling the PMIC RESET_IN.  Driving this pin low will initiate a properly sequenced shut-down of the AM5718 and the power rails driving it.

    Tom

  • 0
    TI__Genius 13567 points

    Hi Rakesh,

    Let me help with understanding the PMIC + Processor interaction:

    • TPS659037 has many OFF2ACT signals (one of them is POWERHOLD), please review section 5.4.2 of the datasheet and choose what works for your system.
    • TPS659037 has a pin called POWERHOLD / GPIO_7. You can consider this the master EN signal for the PMIC
      • POWERHOLD = 1 will start the OFF2ACT sequence
      • POWERHOLD = 0 will start the ACT2OFF sequence
      • pulling POWERHOLD low is the last thing you should do after software is ready for power-off
    • TPS659037 has a pin called BOOT1 that will control how POWERHOLD and warm reset operate
      • BOOT1 = 0 allows POWERHOLD = 0 but it requires you to write 1 to the DEV_ON bit in the PMIC within 7 seconds or the PMIC will shut down
      • with BOOT1 = 0 software is required to write 0 to DEV_ON bit and POWERHOLD = 0 to shut down the PMIC
      • BOOT1 = 1 requires you to pull POWERHOLD = 1 within 7 seconds or the PMIC will shut down. It must stay = 1 at all times.

    The TMDXIDK5718 (AM571x IDK) board design has BOOT1 = 1 and POWERHOLD = 1 permanently to 3.3V. This is the only reason you cannot shutdown the PMIC. When you press the PWRON button the PMIC will start the 3.3V supply and pull-up the POWERHOLD signal. Alternatively you can have the PMIC auto-power on when system power is applied by pulling POWERHOLD. The only way to turn off the PMIC is to drive that POWERHOLD signal low after the OS is finished shutting down.

    Refer to the TMDSEVM572X (AM572x GP EVM) schematic for an example of BOOT1 = 0. In this case POWERHOLD = 0 at all times. The PWRON signal is used to power on the PMIC and the DEV_ON bit is set during u-boot to keep the PMIC on. When shutting down the DEV_ON bit is set to 0.

    If you're using a BMC, I encourage you to become more familiar with the documentation and understand the PMIC power controller. Choose the configurations that work for your system rather than a direct copy of the EVM schematic. 

    TPS659037x datasheet

    TPS659037x + Sitara user guide