AM5728: Functional changes of eCAP, eQEP, eHRPWM

Hi g.f.,

In general, the eCAP, eQEP, and eHRPWM operate the same between AM4379 and AM5728. The only register difference I'm aware of is that the PWM’s HRCTL register is at a different offset. However, there are some SoC integration differences (i.e. where the PWMSS interrupts are routed to on the device, the max frequency for the functional clock source, etc.) These details can be found in the device TRM.

I am looking into your GPMC question and will get back with you.

Regards,
Melissa

Hi g.f.-san

As you stated the GPMC_FCLK is 266MHz on the AM57x family. The GPMC_FCLK frequency for AM437x is 100MHz.
Consequently, the GPMC_config registers that are used with AM437x need to be modified when running on AM57x.

The GPMC_CONFIG_n registers trigger events using counters that increment with each GPMC_FCLK cycle. With the GPMC_FCLK being 2.66x faster on AM57x, the counter values need to be increased by ~2.66x to maintain the same timings on the GPMC pins as with AM437x. If the counter does not have enough counts (ie more than 31 counts are required), then the TIMEPARAGRANULARITY bit can be set to increase the counter every other cycle instead of every GPMC_FCLK cycle.

If the GPMC_CLK is being used, the datasheet for AM57x states that the maximum GPMC_CLK supported is 88.7MHz. To achieve this frequency, GPMCFCLKDIVIDER must be set to a value of 2, so that the 266MHz clock is divided by 3. Rules for synchronous transfers must be followed (for both write and read cycles): processors.wiki.ti.com/.../Tips_for_configuring_Sitara_GPMC_registers

Additionally, the AM57x supports 8 chip selects, while AM437x supports 7 chip selects.

The number of address lines and addressable range is the same. Documentation is slightly different however regarding whether GPMC_A[1] carries A0 or A1 in 16-bit mode.
AM437x states that A0 appears on GPMC_A[1] in Non-muxed, 16-bit mode (with the note (1) below).
AM57x states that A1 appears on GPMC_A[1] in Non-muxed, 16-bit mode (without any note).

“(1) The values in this column represent the signals on the memory. Be aware that some 16-bit memories may label the address lines differently. Some label (the LSB as A0, while others use A1 for the LSB. These columns assume the LSB is A0.”

What is the use case for the GPMC? Synchronous/Asynchronous, burst/non-burst, Non-muxed/AD-muxed/AAD-muxed, etc.?

Let me know if they need help modifying the GPMC_CONFIG registers to achieve the same function.

Regards,
Mark

[EDIT - AM437x  instead of AM335x]