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RTOS/AM6548: boot.asm for RTOS on R5 seems to be wrong

Thomas Dorsch
Expert 2601 points
Part Number: AM6548
Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI-RTOS

Hi,

I try to create a new application to blink the LEDs on my evaluation board with AM6548 IDK.

The application should be RTOS based and run on the first R5.

Problem: If I follow the steps
I can't configure the GPIO-Pins, since I can not access the MMR registers.

You can see on the upper right side at  Memory Browser 0x108000 "????????" for CTRL_MMR0_CFG0_CTRLMMR_OBSCLK_CTRL. Later in my application, I get a exception when trying to access this address.

After debugging around, I found the point where 0x108000 where not accessible anymore:
    ti_sysbios_family_arm_v7r_Cache_startup__I();
    Cache_enableL1d();              /* Enable L1D Cache */        <- After this call, 0x108000 is not read/writeable

I compared this with the functional diag LED demonstration "led_diagExample_am65xx_idk_armv7.out". This example works, since it uses other "startup" code (packages/ti/csl/arch/r5/src/startup/startup.c".

Why is the initialization of the R5 with RTOS not correct? Do I miss something here?

  • 0
    Expert 2601 points

    The screenshot was missing in my first post:

  • 0
    TI__Guru** 116280 points
    Thomas,

    For R5F RTOS MPU and cache setting, I would recommend that you look at one of the existing PDK examples. The configuration of the cores MPU and cache and application memory map has been made more flexible and user defined as compared to previous SItara platforms where BIOS had a predefined platform definition and MMU/cache settings.

    The new approach requires users to provide MPU settings for the base line BIOS to configure as part of the core stattup. This is done in the PDK using file referred to as MPU.xs. YOu can locate one in the top level build folder pdk_am65xx_1_0_3\packages\ti\build\am65xx

    For specific example, you can look at equivalent MPU.xs files, under examples or test folders of the driver:
    pdk_am65xx_1_0_3\packages\ti\drv\gpio\test\led_blink\am65xx

    The MPU settings sets up the regions and permissions and caching policy for these regions. Make sure to set the correct permissions to allow read write and execute access to regions that you want to be accessible from the application.

    Let me know if you have further questions and I can try to clarify.

    Regards,
    Rahul

    PS: We plan to add RTOS Tempate app for R5F in Processor SDK RTOS 5.03 so it should be available in the MArch to early April time frame.