Part Number: AM3352
Hi
Regarding to TRM (SPRUH73P), REG:SDRAM_TIM_2, BIT:27-25 is reserved with 2h, so we never access it.
And these bits represents ODTLon in DDR3 timing configuration tool.
So I think we need to set "2" to ODTLon cell in configuration tool in any case.
Is my understanding correct?
BestRegards