AM4378: DISP PLL setting

shigehiro tsuda

Mastermind 9490 points

Part Number: AM4378

Hi,

There are two types of DISP PLL setting as follows.

Could you tell me why there are two types?
①CM_XXX_DPLL_DISP
②CTRL_DISPPLL_XXX

Usually I think that setting with only ① is good, but in this case, please let us know if you need to use ②.

Although I checked the source of Processor SDK linux and Processor SDK RTOS, it seems to support only ①.

Best Regards,
Shigehiro Tsuda

over 6 years ago

0 Pavel Botev over 6 years ago

TI__Guru**** 170625 points

Hi Shigehiro,

The display PLL also provides a clock to the time sync module clock of the Ethernet switch (CPTS_RFT_CLK). Display PLL can be optionally controlled using the control module registers (CTRL_DISPPLL_i) for on-the-fly fine tuning of the time sync clock frequency using the fractional M multiplier.

Check AM437x TRM sections:

- 6.6.10 Display PLL Description
- 7.3.1.15 CTRL_DISPLAY_PLL_SEL Register

Regards,
Pavel

0 Pavel Botev over 6 years ago in reply to Pavel Botev

TI__Guru**** 170625 points

If you have no more questions related to the subject of this e2e thread, please close/verify/resolve this thread.

Regards,
Pavel

0 shigehiro tsuda over 6 years ago in reply to Pavel Botev

Mastermind 9490 points

Hi Pavel,

Thank you for your support.
I could understand these registers by your answer.

Best Regards,
Shigehiro Tsuda

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AM4378: DISP PLL setting