TMS320DM8148： HDMI CEC Timing spec.

Hello,

You can find info regarding HDMI CEC in DM814x TRM, datasheet and below links:

processors.wiki.ti.com/.../TI81XX_PSP_HDMI_Driver_User_Guide

e2e.ti.com/.../290215
e2e.ti.com/.../267007
e2e.ti.com/.../235487
e2e.ti.com/.../602963
e2e.ti.com/.../623823

Regards,
Pavel

No, I need TMS320DM8148 CEC Timing diagram.

Pls see the below product picture for ur confirmation.

Regarding DM814x’s sampling point of CEC Valid Data Bit:
We would like to confirm the period between the valid data's falling edge and DM814x's
sampling point. On the HDMI 1.3a standards, CEC 5.2.2 Data Bit Timing section specifies
the safe sample period of the incoming data. It should be within T4(0.85ms) to T5(1.25ms).
We think that DM814x samples the valid data at after 1.05ms of the falling edge of data bit.
1.05ms means the middle of the safe sampling period. Is it correct?

DM814x HDMI specific info is available in DM814x datasheet. Everything else should be compatible with HDMI 1.3a standard.

Regards,
Pavel