Hi All,
- I'm trying to boot OPTEE on CL-SOM-AM57x module, I have compiled OPTEE from source ti-optee-os available on Github.
- I've loaded OPTEE at 0x83000000 address when booting it from u-boot.
- While compiling OPTEE I gave kernel and device tree load address as 0x82000000 and 0x83000000 respectively.
- I've changed TZDRAM_BASE address in TI OPTEE platform config as 0xFE000000, to assign it at end of RAM.
- When creating image using mkimage for OPTEE I gave load address and entry point address as 0xFDFFFFE4 and 0xFE000000 respectively.
- I get below logs when booting OPTEE from u-boot:
D/TC:0 0 add_phys_mem:539 TEE_SHMEM_START type NSEC_SHM 0xffc00000 size 0x00400000
D/TC:0 0 add_phys_mem:539 TA_RAM_START type TA_RAM 0xfe100000 size 0x01b00000
D/TC:0 0 add_phys_mem:539 VCORE_UNPG_RW_PA type TEE_RAM_RW 0xfe048000 size 0x000b8000
D/TC:0 0 add_phys_mem:539 VCORE_UNPG_RX_PA type TEE_RAM_RX 0xfe000000 size 0x00048000
D/TC:0 0 add_phys_mem:539 CONSOLE_UART_BASE type IO_NSEC 0x48000000 size 0x00100000
D/TC:0 0 add_phys_mem:539 GICD_BASE type IO_SEC 0x48200000 size 0x00100000
D/TC:0 0 add_phys_mem:539 GICC_BASE type IO_SEC 0x48200000 size 0x00100000
D/TC:0 0 add_phys_mem:552 Physical mem map overlaps 0x48200000
D/TC:0 0 add_phys_mem:539 SECRAM_BASE type IO_SEC 0x40200000 size 0x00100000
D/TC:0 0 add_phys_mem:539 TZDRAM_BASE type RAM_SEC 0xfe000000 size 0x00100000
D/TC:0 0 add_phys_mem:539 RNG_BASE type IO_SEC 0x48000000 size 0x00100000
D/TC:0 0 verify_special_mem_areas:483 SDP memory [ffc00000 0]
D/TC:0 0 verify_special_mem_areas:477 No NSEC DDR memory area defined
D/TC:0 0 add_va_space:578 type RES_VASPACE size 0x00a00000
D/TC:0 0 add_va_space:578 type SHM_VASPACE size 0x02000000
D/TC:0 0 dump_mmap_table:711 type IO_SEC va 0xf8e00000..0xf8efffff pa 0x48000000..0x480fffff size 0x00100000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type IO_SEC va 0xf8f00000..0xf8ffffff pa 0x40200000..0x402fffff size 0x00100000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type IO_NSEC va 0xf9000000..0xf90fffff pa 0x48000000..0x480fffff size 0x00100000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type RAM_SEC va 0xf9100000..0xf91fffff pa 0xfe000000..0xfe0fffff size 0x00100000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type NSEC_SHM va 0xf9200000..0xf95fffff pa 0xffc00000..0xffffffff size 0x00400000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type TA_RAM va 0xf9700000..0xfb1fffff pa 0xfe100000..0xffbfffff size 0x01b00000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type RES_VASPACE va 0xfb300000..0xfbcfffff pa 0x00000000..0x009fffff size 0x00a00000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type IO_SEC va 0xfbe00000..0xfbefffff pa 0x48200000..0x482fffff size 0x00100000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type SHM_VASPACE va 0xfbf00000..0xfdefffff pa 0x00000000..0x01ffffff size 0x02000000 (pgdir)
D/TC:0 0 dump_mmap_table:711 type TEE_RAM_RX va 0xfe000000..0xfe047fff pa 0xfe000000..0xfe047fff size 0x00048000 (smallpg)
D/TC:0 0 dump_mmap_table:711 type TEE_RAM_RW va 0xfe048000..0xfe0fffff pa 0xfe048000..0xfe0fffff size 0x000b8000 (smallpg)
D/TC:0 0 core_mmu_alloc_l2:238 L2 table used: 1/4
I/TC:
D/TC:0 0 init_canaries:164 #Stack canaries for stack_tmp[0] with top at 0xfe0489b8
D/TC:0 0 init_canaries:164 watch *0xfe0489bc
D/TC:0 0 init_canaries:164 #Stack canaries for stack_tmp[1] with top at 0xfe0490f8
D/TC:0 0 init_canaries:164 watch *0xfe0490fc
D/TC:0 0 init_canaries:165 #Stack canaries for stack_abt[0] with top at 0xfe04d9b8
D/TC:0 0 init_canaries:165 watch *0xfe04d9bc
D/TC:0 0 init_canaries:165 #Stack canaries for stack_abt[1] with top at 0xfe04e1f8
D/TC:0 0 init_canaries:165 watch *0xfe04e1fc
D/TC:0 0 init_canaries:167 #Stack canaries for stack_thread[0] with top at 0xfe04b138
D/TC:0 0 init_canaries:167 watch *0xfe04b13c
D/TC:0 0 init_canaries:167 #Stack canaries for stack_thread[1] with top at 0xfe04d178
D/TC:0 0 init_canaries:167 watch *0xfe04d17c
- After debugging further in OPTEE, I found in core/arch/arm/kernel/generic_boot.c in OPTEE it get stuck while in sec_mon_init function, which further calls sm_init function, then gets stuck.
- After above logs OPTEE get's stuck, so what is reason behind same?
Thanks and Regards,
Sumit Gajjar