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TMS320C6711D: maximum input clock frequency in BYPASS mode

Part Number: TMS320C6711D

Team,

My customer has the following question. 

In the TMS320C6711D datasheet Timing Requirement for CLKIN table on page 69 there is no maximum frequency listed for the BYPASS mode of operation. If we are using a GPDA-167 part what is the maximum input frequency that we can drive into the CLKIN pin when running in BYPASS mode?

Regards,

Aaron

  • Hi Aaron,

    Let me do some digging on the bypass mode of the PLL used in the C6711D per your other post.

    See page 69 of the datasheet. CLKIN seems to support upto 150MHz (6.7ns period, Bypass mode PLLEN = 0, default). The datasheet table shows PLL MODE and BYPASS MODE timing requirements for both GDPA-167 and ZDPA−167 together.

    Do they utilize any of the power down modes? These seem to require using the PLL not in bypass mode.

    Regards,
    Mark
  • Hi Aaron,

    Tying together your related question: e2e.ti.com/.../2855294

    We believe the PLL needs to be programmed after booting, even for Bypass Mode. This is based on the text in the migration guide.

    The Datasheet table for CLKIN supports a 6.7ns period for 150MHz in Bypass mode - see previous post.

    Regards,
    Mark