DM644x & THS8200 Daughter Card & SVGA Output

If you post a dump of your VPBE register settings, I may be able to offer advice

 /* Reset video encoder module */
 dispc_reg_out(VENC_VMOD, 0);

 enableDigitalOutput(1);

 dispc_reg_out(VENC_VIDCTL, (VENC_VIDCTL_VCLKE | VENC_VIDCTL_VCLKP));
 /* Setting DRGB Matrix registers back to default values */
 dispc_reg_out(VENC_DRGBX0, 0x00000400);
 dispc_reg_out(VENC_DRGBX1, 0x00000576);
 dispc_reg_out(VENC_DRGBX2, 0x00000159);
 dispc_reg_out(VENC_DRGBX3, 0x000002cb);
 dispc_reg_out(VENC_DRGBX4, 0x000006ee);

 /* Enable DCLOCK */
 dispc_reg_out(VENC_DCLKCTL, VENC_DCLKCTL_DCKEC);
 /* Set DCLOCK pattern */
 dispc_reg_out(VENC_DCLKPTN0, 1);
 dispc_reg_out(VENC_DCLKPTN1, 0);
 dispc_reg_out(VENC_DCLKPTN2, 0);
 dispc_reg_out(VENC_DCLKPTN3, 0);
 dispc_reg_out(VENC_DCLKPTN0A, 2);
 dispc_reg_out(VENC_DCLKPTN1A, 0);
 dispc_reg_out(VENC_DCLKPTN2A, 0);
 dispc_reg_out(VENC_DCLKPTN3A, 0);
 dispc_reg_out(VENC_DCLKHS, 0);
 dispc_reg_out(VENC_DCLKHSA, 1);
 dispc_reg_out(VENC_DCLKHR, 0);
 dispc_reg_out(VENC_DCLKVS, 0);
 dispc_reg_out(VENC_DCLKVR, 0);
 /* Set brightness start position and pulse width to zero */
 dispc_reg_out(VENC_BRTS, 0);
 dispc_reg_out(VENC_BRTW, 0);
 /* Set LCD AC toggle interval and horizontal position to zero */
 dispc_reg_out(VENC_ACCTL, 0);

 /* Set PWM period and width to zero */
 dispc_reg_out(VENC_PWMP, 0);
 dispc_reg_out(VENC_PWMW, 0);

 dispc_reg_out(VENC_CVBS, 0);
 dispc_reg_out(VENC_CMPNT, 0);
 /* turning on horizontal and vertical syncs */
 dispc_reg_out(VENC_SYNCCTL, (VENC_SYNCCTL_SYEV | VENC_SYNCCTL_SYEH));
 dispc_reg_out(VENC_OSDCLK0, 0);
 dispc_reg_out(VENC_OSDCLK1, 1);
 dispc_reg_out(VENC_OSDHADV, 0);

 davinci_writel(0xa, SYS_VPSS_CLKCTL);
 if (cpu_is_davinci_dm355()) {
  dispc_reg_out(VENC_CLKCTL, 0x11);
  davinci_writel(mode_info->left_margin,
          (DM355_OSD_REG_BASE + OSD_BASEPX));
  davinci_writel(mode_info->upper_margin,
          (DM355_OSD_REG_BASE + OSD_BASEPY));
  davinci_cfg_reg(DM355_VOUT_FIELD_G70);
  davinci_cfg_reg(DM355_VOUT_COUTL_EN);
  davinci_cfg_reg(DM355_VOUT_COUTH_EN);
 } else {
  davinci_writel(mode_info->left_margin,
          (DM644X_OSD_REG_BASE + OSD_BASEPX));
  davinci_writel(mode_info->upper_margin,
          (DM644X_OSD_REG_BASE + OSD_BASEPY));
  davinci_cfg_reg(DM644X_LOEEN);
  davinci_cfg_reg(DM644X_GPIO3);
 }

 /* Set VENC for non-standard timing */
 davinci_enc_set_display_timing(mode_info);

 dispc_reg_out(VENC_HSDLY, 0);
 dispc_reg_out(VENC_VSDLY, 0);
 dispc_reg_out(VENC_YCCCTL, 0);
 dispc_reg_out(VENC_VSTARTA, 0);

 /* Enable all VENC, non-standard timing mode, master timing, HD,
    progressive
  */
 if (cpu_is_davinci_dm355()) {
  dispc_reg_out(VENC_VMOD, (VENC_VMOD_VENC | VENC_VMOD_VMD));
 } else {
  dispc_reg_out(VENC_VMOD,
         (VENC_VMOD_VENC | VENC_VMOD_VMD |
          VENC_VMOD_HDMD));
 }
 dispc_reg_out(VENC_LCDOUT, 1);

Hi,

We using DM6446 EVM with THS8200 (Rev C) daughter card. Our aim is to display 800x600@60fps over VGA connector on THS8200 daughter card.

Based on previous posts in this forum, we have translated voltage levels of HS_OUT and VS_OUT signals to 3.3V by adding 2-bit level translater on THS8200 board.

As present THS8200 driver doesn't support output on VGA connecter, we have done couple of modifications to driver.

720P-60 on VGA connector experiment:

First we tested 720P-60 output on VGA connector. Following changes are done,

1) VENC_VMOD programmed to give RGB565 output. VENC_VIDCTL changed to make VCLKP=0.

2) THS8200_DTG2_CNTL (0x82) changed to 0x5b. (dtg2_rgb_mode_on set to 1).

3) THS8200_DTG1_MODE (0x38) changed to 0x87. (dtg1_mode set to VESA slave)

4) THS8200_DATA_CNTL (0x1c) changed to 0x21. (data_ifir12_bypass = 1 and data_dman_cntl = 001 - 16-bit RGB 4:4:4)

Other than these changes, we have not modified anything else. With these changes, we get 720P output with proper colors on monitor. Though we are seeing some horizontal shift on the display which is not major concern right now.

SVGA-60 on VGA connector experiment:

After this experiment, we are modifying driver to display SVGA output on VGA connector. For this we are taking 720P settings as reference. Following changes are done, 1) We have added one more standard in 'ths8200_encoder.c', with following settings,

         .name = VID_ENC_STD_SVGA_VESA_60,
         .std = 1,
         .if_type = VID_ENC_IF_PRGB,   /* TBD */
         .interlaced = 0,
         .xres = 800,
         .yres = 600,
         .fps = {60, 1},
         .left_margin = 140,
         .right_margin = 116,
         .upper_margin = 15,
         .lower_margin = 10,
         .hsync_len = 80,
         .vsync_len = 5,
         .flags = 0},

2) VENC_VMOD programmed to give RGB565 output.VENC_VIDCTL changed to make VCLKP=0.

3) THS8200_DTG2_CNTL (0x82) changed to 0x5b. (dtg2_rgb_mode_on set to 1).

 4) THS8200_DTG1_MODE (0x38) changed to 0x87. (dtg1_mode set to VESA slave)

5) THS8200_DATA_CNTL (0x1c) changed to 0x21. (data_ifir12_bypass = 1 and data_dman_cntl = 001 - 16-bit RGB 4:4:4)

6) Programed CDCE949 clock to output 39.6MHz clock for SVGA@60fps.

7) THS8200_DTG1_TOT_PIXELS_MSB (0x34) set to 0x04

8) THS8200_DTG1_TOT_PIXELS_LSB (0x35) set to 0x20

9) THS8200_DTG1_FRAME_FIELD_SZ_MSB (0x39) set to 0x27

10) THS8200_DTG1_FRAME_SZ_LSB (0x3a) set to 0x71

11) THS8200_DTG1_SPEC_E_LSB (0x2a) set to 0x8c

12) THS8200_DTG1_SPEC_DEH_MSB (0x2b) set to 0x80

Apart from above registers, remaining THS8200 registers are same as 720P configuration.

With these changes, we get video output on monitor.

But displayed video's brightness level is too low and colors are also distorted. Also, there is one fixed vertical line on left side of display.

Based on this information, we have following questions,

1) For SVGA, are any more settings required to be changed (both on DM6446 and THS8200)? Are we missing anything?

2) If THS8200 is set in VESA slave mode, then is it necessary to make changes as mentioned in points7-12 above? These changes are done based on application report SPRAAN0.pdf

3) What could be the reasons for low brightness level on display? Also vertical line on the left side?

If anyone has same clue about this problem, please let us know.

Thanks in advance.

-- satyajit

I think you want the VMOD to be set to YCbCr output instead of RGB between the DM6446 and the THS8200.  The THS8200 has a color conversion block that converts the 4:2:2 YCbCr downsampled color to RGB for you.  At least, that is what we are trying to do.  I think that is how the daughter card is physically wired to the DVEVM anyway.