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Linux/AM3359: SPI READ ISSUE

Part Number: AM3359

Tool/software: Linux

Hello all,

                             We are working on a custom board based on am335x-icev2.We are trying to read and write to spi flash.While reading the data,it seems to be misaligned.What could be the issue.

U-boot log:

=> sf probe 1:0
SF: Detected n25q256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB
=> mw 0x82000000 0xbbbb 0x100
=> md 0x82000000 0x100
82000000: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000010: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000020: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000030: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000040: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000050: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000060: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000070: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000080: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000090: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820000a0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820000b0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820000c0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820000d0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820000e0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820000f0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000100: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000110: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000120: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000130: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000140: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000150: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000160: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000170: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000180: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000190: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820001a0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820001b0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820001c0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820001d0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820001e0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820001f0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000200: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000210: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000220: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000230: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000240: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000250: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000260: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000270: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000280: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000290: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820002a0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820002b0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820002c0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820002d0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820002e0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820002f0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000300: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000310: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000320: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000330: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000340: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000350: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000360: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000370: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000380: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
82000390: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820003a0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820003b0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820003c0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820003d0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820003e0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
820003f0: 0000bbbb 0000bbbb 0000bbbb 0000bbbb    ................
=> sf probe 1:0
SF: Detected n25q256 with page size 256 Bytes, erase size 4 KiB, total 32 MiB
=> sf write 0x82000000 0x0 0x100
device 0 offset 0x0, size 0x100
SF: 256 bytes @ 0x0 Written: OK
=> sf read 0x84000000 0x0 0x100
device 0 offset 0x0, size 0x100
SF: 256 bytes @ 0x0 Read: OK
=> md 0x84000000 0x100
84000000: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000010: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000020: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000030: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000040: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000050: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000060: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000070: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000080: bb0000bb bb0000bb bb0000bb bb0000bb    ................
84000090: bb0000bb bb0000bb bb0000bb bb0000bb    ................                                                          
840000a0: bb0000bb bb0000bb bb0000bb bb0000bb    ................                                                          
840000b0: bb0000bb bb0000bb bb0000bb bb0000bb    ................                                                          
840000c0: bb0000bb bb0000bb bb0000bb bb0000bb    ................                                                          
840000d0: bb0000bb bb0000bb bb0000bb bb0000bb    ................                                                          
840000e0: bb0000bb bb0000bb bb0000bb bb0000bb    ................                                                          
840000f0: bb0000bb bb0000bb bb0000bb ff0000bb    ................     

dts file :

/*
 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/*
 * AM335x ICE V2 board
 * http://www.ti.com/tool/tmdsice3359
 */

/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	model = "TI AM3359 ICE-V2";
	compatible = "ti,am3359-icev2", "ti,am33xx";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	chosen {
		stdout-path = &uart0;
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	vtt_fixed: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "vtt";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
	};

	leds-iio {
		status = "disabled";
		compatible = "gpio-leds";
		led-out0 {
			label = "out0";
			gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out1 {
			label = "out1";
			gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out2 {
			label = "out2";
			gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out3 {
			label = "out3";
			gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out4 {
			label = "out4";
			gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out5 {
			label = "out5";
			gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out6 {
			label = "out6";
			gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led-out7 {
			label = "out7";
			gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};

	/* Tricolor status LEDs */
	leds1 {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&user_leds>;

		led0 {
			label = "status0:red:cpu0";
			gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "cpu0";
		};

		led1 {
			label = "status0:green:usr";
			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led2 {
			label = "status0:yellow:usr";
			gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led3 {
			label = "status1:red:mmc0";
			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "mmc0";
		};

		led4 {
			label = "status1:green:usr";
			gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		led5 {
			label = "status1:yellow:usr";
			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};
	gpio-decoder {
		compatible = "gpio-decoder";
		gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
			<&pca9536 2 GPIO_ACTIVE_HIGH>,
			<&pca9536 1 GPIO_ACTIVE_HIGH>,
			<&pca9536 0 GPIO_ACTIVE_HIGH>;
		linux,axis = <0>; /* ABS_X */
		decoder-max-value = <9>;
	};

	/* Dual mac ethernet application node on icss */
	/*pruss_eth {
		compatible = "ti,am3359-prueth";
		pruss = <&pruss>;
		sram = <&ocmcram>;
		interrupt-parent = <&pruss_intc>;
		status = "disabled";

		pinctrl-0 = <&pruss_eth_default>;
		pinctrl-names = "default";

		pruss_emac0: ethernet-mii0 {
			phy-handle = <&pruss_eth0_phy>;
			phy-mode = "mii";
			interrupts = <20>, <22>;
			interrupt-names = "rx", "tx";
			/* Filled in by bootloader 
			local-mac-address = [00 00 00 00 00 00];
		};

		pruss_emac1: ethernet-mii1 {
			phy-handle = <&pruss_eth1_phy>;
			phy-mode = "mii";
			interrupts = <21>, <23>;
			interrupt-names = "rx", "tx";
			/* Filled in by bootloader 
			local-mac-address = [00 00 00 00 00 00];
		};
	};*/
};

&am33xx_pinmux {
	user_leds: user_leds {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] */
			AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE7) /* (K15) gmii1_txd2.gpio0[17] */
			AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] */
			AM33XX_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE7) /* (D14) xdma_event_intr1.gpio0[20] */
			AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
			AM33XX_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] */
		>;
	};

	mmc0_pins_default: mmc0_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
		>;
	};

	i2c0_pins_default: i2c0_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
			AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
		>;
	};

	spi0_pins_default: spi0_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
			AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
			AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
			AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* (C15) spi0_cs1.spi0_cs1 */
			AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
		>;
	};
	
	spi1_pins_default: spi1_pins_default {
                pinctrl-single,pins = <
                AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE3) /* (A13) mcasp0_aclkx.spi1_sclk */
                AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3) /* (B13) mcasp0_fsx.spi1_d0 */
                AM33XX_IOPAD(0x998, PIN_INPUT_PULLUP | MUX_MODE3) /* (D12) mcasp0_axr0.spi1_d1 */
                AM33XX_IOPAD(0x99c, PIN_INPUT_PULLUP | MUX_MODE3) /* (C12) mcasp0_ahclkr.spi1_cs0 */
                >;
        };


	uart3_pins_default: uart3_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
			AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
		>;
	};
	
	 uart4_pins_default: uart4_pins_default {
                pinctrl-single,pins = <
                        AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
                        AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
                >;
        };

     cpsw_default: cpsw_default {
                pinctrl-single,pins = <
                                /* Slave 1 */
                AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
                AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rctl */
                AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
                AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
                AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
                AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)/* mii1_txd0.rgmii1_td0 */

                AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
                AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rgmii1_rclk */
                AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd3.rgmii1_rd3 */
                AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd2.rgmii1_rd2 */
                AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
                AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
                AM33XX_IOPAD(0xA34, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (F15) USB1_DRVVBUS.gpio3[13] */
        >;
        };

        cpsw_sleep: cpsw_sleep {
                pinctrl-single,pins = <
                AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (J16) gmii1_txen.rgmii1_tctl */
                AM33XX_IOPAD(0x918, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (J17) gmii1_rxdv.rgmii1_rctl */
                AM33XX_IOPAD(0x92c, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (K18) gmii1_txclk.rgmii1_tclk */
                AM33XX_IOPAD(0x930, (PIN_INPUT_PULLDOWN | MUX_MODE7)) /* (L18) gmii1_rxclk.rgmii1_rclk */
                AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (K17) gmii1_txd0.rgmii1_td0 */
                AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (K16) gmii1_txd1.rgmii1_td1 */
                AM33XX_IOPAD(0x920, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (K15) gmii1_txd2.rgmii1_td2 */
                AM33XX_IOPAD(0x91c, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (J18) gmii1_txd3.rgmii1_td3 */
                AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (M16) gmii1_rxd0.rgmii1_rd0 */
                AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (L15) gmii1_rxd1.rgmii1_rd1 */
                AM33XX_IOPAD(0x938, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (L16) gmii1_rxd2.rgmii1_rd2 */
                AM33XX_IOPAD(0x934, (PIN_INPUT_PULLDOWN | MUX_MODE7) ) /* (L17) gmii1_rxd3.rgmii1_rd3 */
                AM33XX_IOPAD(0xA34, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    

                >;
        };

        davinci_mdio_default: davinci_mdio_default {
                pinctrl-single,pins = <
                        /* MDIO */
                        AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0))     /* mdio_data.mdio_data */
                        AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0))                    /* mdio_clk.mdio_clk */
        
                >;
        };

        davinci_mdio_sleep: davinci_mdio_sleep {
                pinctrl-single,pins = <
                        /* MDIO reset value */
                        AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
                        AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
                >;
        };


};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins_default>;

	status = "okay";
	clock-frequency = <400000>;

	tps: power-controller@2d {
		reg = <0x2d>;
	};

	tpic2810: gpio@60 {
		compatible = "ti,tpic2810";
		reg = <0x60>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	pca9536: gpio@41 {
		compatible = "ti,pca9536";
		reg = <0x41>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins_default>;

	sn65hvs882@1 {
		compatible = "pisosr-gpio";
		gpio-controller;
		#gpio-cells = <2>;

		load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;

		reg = <1>;
		spi-max-frequency = <1000000>;
		spi-cpol;
	};

	spi_nor: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "winbond,w25q64", "jedec,spi-nor";
		spi-max-frequency = <80000000>;
		m25p,fast-read;
		reg = <0>;

		partition@0 {
			label = "u-boot-spl";
			reg = <0x0 0x80000>;
			read-only;
		};

		partition@1 {
			label = "u-boot";
			reg = <0x80000 0x100000>;
			read-only;
		};

		partition@2 {
			label = "u-boot-env";
			reg = <0x180000 0x20000>;
			read-only;
		};

		partition@3 {
			label = "misc";
			reg = <0x1A0000 0x660000>;
		};
	};

};

&spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins_default>;

	spi_nor1: flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "winbond,w25q64", "jedec,spi-nor";
		spi-max-frequency = <48000000>;
		m25p,fast-read;
		reg = <0>;

		partition@0 {
			label = "u-boot-spl";
			reg = <0x0 0x80000>;
			read-only;
		};

		partition@1 {
			label = "u-boot";
			reg = <0x80000 0x100000>;
			read-only;
		};

		partition@2 {
			label = "u-boot-env";
			reg = <0x180000 0x20000>;
			read-only;
		};

		partition@3 {
			label = "misc";
			reg = <0x1A0000 0x660000>;
		};
	};

};



&tscadc {
	status = "okay";
	adc {
		ti,adc-channels = <1 2 3 4 5 6 7>;
	};
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1326000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmc_reg>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins_default>;
};

&gpio0 {
	/* Do not idle the GPIO used for holding the VTT regulator */
	ti,no-reset-on-init;
	ti,no-idle-on-init;

	p7 {
		gpio-hog;
		gpios = <7 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "FET_SWITCH_CTRL";
	};
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins_default>;
	status = "okay";
};
&uart4 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart4_pins_default>;
        status = "okay";
};

&gpio3 {
	p4 {
		gpio-hog;
		gpios = <4 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "PR1_MII_CTRL";
	};

	p10 {
		gpio-hog;
		gpios = <10 GPIO_ACTIVE_HIGH>;
		/* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
		output-high;
		line-name = "MUX_MII_CTL1";
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	mode-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
	status = "okay";
};



&davinci_mdio {
	pinctrl-names = "default", "sleep";
	compatible = "ti, cpsw-mdio","ti,davinci_mdio";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
	ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_75_NS>;
	ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_75_NS>;
	ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	ti,min-output-impedance;
	ti,dp83867-rxctrl-strap-quirk;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0x0>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <0x0>;
	phy-mode = "rgmii-id";
	status = "okay";
};


&i2c1{
        compatible = "ti,omap4-i2c";
        #address-cells = <1>;
        #size-cells = <0>;
        ti,hwmods = "i2c2";
        reg = <0x4802a000 0x1000>;
        interrupts = <71>;
        status = "okay";
		ad7414@48 {
			compatible = "analog,ad7414";
        		reg = <0x48>;
      		  	status = "okay";
    			};
      };


&gpmc {
status = "okay";
pinctrl-names = "default";
/*pinctrl-0 = <&gpmc_pins>;*/
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "NAND.u-boot-spl-os";
reg = <0x00080000 0x00040000>;
};
partition@5 {
label = "NAND.u-boot";
reg = <0x000C0000 0x00100000>;
};
partition@6 {
label = "NAND.u-boot-env";
reg = <0x001C0000 0x00020000>;
};
partition@7 {
label = "NAND.kernel-dtb";
reg = <0x001E0000 0x00020000>;
};
partition@8 {
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
};
partition@9 {
label = "NAND.file-system";
reg = <0x00A00000 0x0F600000>;
};
};

fpga{
reg = <1 0 0x01000000>; /*CSn1*/

bank-width = <2>; /* GPMC_CONFIG1_DEVICESIZE(1) */

/*gpmc,burst-write;*/
/*gpmc,burst-read;*/
/*gpmc,burst-wrap;*/
gpmc,sync-read; /* GPMC_CONFIG1_READTYPE_ASYNC */
gpmc,sync-write; /* GPMC_CONFIG1_WRITETYPE_ASYNC */
gpmc,clk-activation-ns = <0>; /* GPMC_CONFIG1_CLKACTIVATIONTIME(2) */
gpmc,burst-length = <16>; /* GPMC_CONFIG1_PAGE_LEN(2) */
gpmc,mux-add-data = <2>; /* GPMC_CONFIG1_MUXTYPE(2) */

gpmc,sync-clk-ps = <20000>; /* CONFIG2 */

gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <100>;
gpmc,cs-wr-off-ns = <40>;

gpmc,adv-on-ns = <0>; /* CONFIG3 */
gpmc,adv-rd-off-ns = <20>;
gpmc,adv-wr-off-ns = <20>;

gpmc,we-on-ns = <20>; /* CONFIG4 */
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <20>;
gpmc,oe-off-ns = <100>;

gpmc,page-burst-access-ns = <20>; /* CONFIG 5 */
gpmc,access-ns = <80>;
gpmc,rd-cycle-ns = <120>;
gpmc,wr-cycle-ns = <60>;
gpmc,wr-access-ns = <40>; /* CONFIG 6 */
gpmc,wr-data-mux-bus-ns = <20>;

/*gpmc,bus-turnaround-ns = <40>;*/ /* CONFIG6:3:0 = 4 */
gpmc,cycle2cycle-samecsen; /* CONFIG6:7 = 1 */
gpmc,cycle2cycle-delay-ns = <20>; /* CONFIG6:11:8 = 4 */

/* not using dma engine yet, but we can get the channel number here */
dmas = <&edma 1>;
dma-names = "cscdma";

};
};

Regards,

Murugan S