Tool/software: TI-RTOS
Hello all,
We are using DRA7xx Processor. We are using IPU1 for camera & Display.. We don't have U-boot and We have IPL as boot loader.
Resource table contains already a specification of the MMU settings for the M4. Unfortunately these are not very specific.
devmen => IPU_REG_SPACE_MAP1: da 0x60100000, pa 0x40100000, len 0x1FF00000
devmen => IPU_REG_SPACE_MAP2: da 0x40000000, pa 0x40000000, len 0x20000000
Entries like this would allow the M4 to access all registers, regardless if they are needed or not.
Is it possible to restrict the entries in a way, to open only the absolute minimum needed address spaces ?
Regards,
Gokul
