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RTOS/PROCESSOR-SDK-AM437X: How to know which interrupt from the host ARM in the PRU

Part Number: PROCESSOR-SDK-AM437X

Tool/software: TI-RTOS

In the PRU example PRU_ARMtoPRU_Interrupt, It has the code:

void main(){
   uint32_t *pDdr = (uint32_t *) &CT_DDR;
   uint32_t score;
   /* Clear SYSCFG[STANDBY_INIT] to enable OCP master port */
   CT_CFG.SYSCFG_bit.STANDBY_INIT = 0;
   /* Wait until receipt of interrupt on host 0 */
   while((__R31 & 0x40000000) == 0){
   }
   /* Clear system event in SECR1 */
   CT_INTC.SECR1 = 0x1;
   /* Clear system event enable in ECR1 */
   CT_INTC.ECR1 = 0x1;
   /* Point C30 (L3) to 0x3000 offset and C31 (DDR) to 0x0 offset */
   PRU0_CTRL.CTPPR1 = 0x00003000;
   /* Load value from DDR, decrement, and store it in L3 */
   score = pDdr[0];
   score--;
   CT_L3 = score;
   /* Halt PRU core */
   __halt();
}
when  (__R31 & 0x40000000) != 0, how we know which bit of  register SECR1 should be clarified specifically? 
from TRM, "The System Event Status Raw/Set Register PRU_ICSS_INTC_SRSRx show the pending enabled status of the system event" mean that we can know the suspended interrupt by reading the register?
  • Part Number: PROCESSOR-SDK-AM437X

    Tool/software: TI-RTOS

    I am developing a product which need to use the  interrupt to implement the data exchange between ARM host and its PRU, where we can get the interrupt API user manual?

    the intereupt imformation of the AM437x TRM is so simple.

    Code Composer Studio Version: 7.4.0.00015
    pdk_am437x_1_0_10
    bios_6_52_00_12
    ndk_2_26_00_08
  • zhuangbin,

    I don't think there is more detailed document than the TRM published.

    The system event table in the section 30.4.2.2 PRU-ICSS System Events may help understand the bits of SECR0/1. That is correct, you can read the PRU_ICSS_INTC_SRSRx register to find the pending interrupt, also you can write to the Status Set Registers to set a system event without a hardware trigger.

    Regards,
    Garrett
  • Hi Garrett.

    I see. also the host CPU can write the SRSRx to signal a interrupt to PRU.