Other Parts Discussed in Thread: AWR1243
Cascade Radar Host Processor Board PROC055 with TDA2 mates with the AWR1243 PROC054 and has 4 chips with 4 channels each so 16 channels. We need to add another AWR1243 so we have 20 channels. In this case we will need to add a 5th FPGA to get the VIP frame for the TDA2. On the TDA2 ports VIP5 and VIP6 are only 16 bits wide not the 24 bits wide of VIP1, VIP2, VIP3 and VIP4. How should be proceed to enable 5 AWR1243 chips radar channels per TDA2?
