Tool/software: Code Composer Studio
Hello TI experts,
C6678 Core0, DirectIO mode SRIO to a slave FPGA. I'd like to generate an interrupt to DSP when write/read is done.
In my application, I think I should use LSU interrupt. What I guess is about LSU0_ICSR: ICS0 – SRCID0, Transaction complete, No Errors.
That's a general interrupt but not a dedicated doorbell interrupt.
However, I can only see system event input No.20 INTDST(n+16), which means doorbell interrupt.
How can I map the LSU interrupt to one of the 12 CPUINT?
Please correct me if I am wrong.
Thank you.
Peijun
