Hello,
Could you tell me the way to control DMA read transfer and write transfer exclusively?
There are two DMA module, System DMA and Enhanced DMA, so could you confirm the feasibility against each DMA?
In normal case, read transfer and write transfer work in parallel and the bus resource is occupied.
My customers want to avoid the situation.
So, they want to stop read transfer by the end of write transfer and stop write transfer by the end of read transfer.
Best Regards,
Nomo
