I have questions about pin configuration in TDA2P processor for our custom ECU. We need to connect two parallel 16b NAND Flash over GPMC interface. It means, we should connect following pins: AD[0:16], BEN0, ADVnALE, WEn, OEnREn, WAIT0 parallel to each NAND, and every NAND will have one CS pin. For the 1st NAND we will connect CS0 pin, and for the 2nd NAND we want to use CS3 pin, instead of CS1 or other CS pins, because the pins (CS1 and CS4-CS7) are already used for other functionalities.
The question is, is there any restriction to decide which CSx pin to be used? would it be complex for configuring the Driver related to CSx pin?
We just want to make sure, that configuring the NAND interface wouldn't be complex during board Startup.
both NAND Flash will not be used for booting.
Thanks in advance