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AM5728: How to setup the DMM for max memory available to Linux

Part Number: AM5728

We have created a board (we do that sometimes)  We're using both EMIFs and each has 2GBytes DDR3LP attached to it for a total of 4GBytes on the board. 

1.  Is it possible to let Linux use all of it?

2.  Assuming not, how much can I feed Linux?

3.  What do I need to do in Linux configuration to accomplish this maximum memory usage?

4. How do I setup the DMM?  There is no 4GByte size in the LISA configuration registers.  I see that I could (technically) setup the 4GByte area using two sections (LISA registers).  What happens to device registers?  Does the processor/memory manager prioritize register addresses over memory addresses?  I guess I could limit the low end 2Gytes to 1 GByte or add a third LISA layout to bring back the 0x60000000 to 0x7fffffff area. At this point, I'm not worried about interleaving - I can handle that.  Please be specific and show the LISA register values I need.

Thanks in advance

-Paul

  • Hi Paul,

    You can refer to automotive SDK Linux, the DRA75x EVM (automotive variant of AM5728 EVM) supports 4GB RAM, 2GB on each EMIF.
    See this thread:
    e2e.ti.com/.../586776

    Best Regards,
    Yordan
  • No, this doesn't answer any of my fairly basic questions.

    In addition, I have another question.  For a 4GByte system, the TI EMIF TOOLS: Register Configuration spreadsheet rev 2.0.2 generates the following DMM/LISA configuration:

     
    const struct dmm_lisa_map_regs AM572x_DDR3L_532MHz_Solix19_Rev_X1_dmm_regs = {
       .dmm_lisa_map_0 = 0x00000000,
       .dmm_lisa_map_1 = 0x00000000,
       .dmm_lisa_map_2 = 0x80740300,
       .dmm_lisa_map_3 = 0xFF020100,
       .is_ma_present = 0x1
    };

    Obviously, this only sets up 2GBytes of SDRAM for Linux plus an additional 16MB section starting at 0x20000000 in EMIF1.  Why is the 16MByte section created.  What is its use?

  • typo: Please replace "16GByte" section with "16MByte section"
  • Hi,

    The dmm_lisa map registers are used for dynamic mapping of the memory (this is done in sections dmm_lisa_map_x) as described in the TRM.

    Take a look at the above thread & the following pdf:
    www.ti.com/.../spraca1.pdf

    It seems that your dmm_lisa_map settings are correct for 4GB RAM (2GB on each EMIF). As discussed in the linked e2e thread in my previous post have a look at the dram_init_banksize.

    Best Regards,
    Yordan
  • My settings may be correct but I do not believe in magic. Why is .dmm_lisa_map_3 = 0xFF020100 in the auto-generated configuration? What purpose does it serve? Also note that this configuration actually uses only 2GByte of the 4GByte available space. What good is having 4GByte on the board?
  • This configurations sets 2GByte sections on each emif and also enables interleaving. Now I am not an expert on the EMIF tool, but the 16MB section should be for some reserved memory in linux kernel/u-boot to work with.

    Best Regards,
    Yordan
  • OK. Where is it used? Why is it configured via TI's configuration tool? Also, my configuration in DMM/LISA (as listed above) Does not configure 2GBytes on each EMIF. It configures 1GByte on each and interleaves fetches giving a total of 2GByte out of the 4GByte available space. The higher priority DMM/LISA line carves out a non-interleaved 16-MByte section and overlays it in the lower 1GB of memory on EMIF1. A total of 2GByte is used by this DMM/LISA setup. Why should I populate 4GByte if I can only use 2GByte?
  • Paul,

    This same issue was recently being discussed in the following E2E thread:

    e2e.ti.com/.../2853090

    We do not have an RTOS solution at this time.  We do have a Linux solution as Linux is able to properly configure the ARM allow it to access the additional 2GB of memory.  There is support for this larger memory implementation in the Automotive version of Proc-SDK but not in the main release that is provided with the AM572x EVMs.  You should be able to pull the code from the Automotive version of Proc-SDK.

    Tom