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Datasheet about SPI (DM365)

Other Parts Discussed in Thread: TMS320DM365

I read datasheets about SPI controller in DM365 processor and I'm confused.

sprufh1a.pdf page 10: "SPIx_SCS[0:1] and SPIx_SCLK are only output for the SPI4 because SPI4 cannot be worked as a slave, and
interrupts are not supported on SPI4."

sprufh1a.pdf page 11, section "2.4 SPI Operation": All SPI Instances other than SPI 4 operate as a master SPI device only. SPI4 can be configured as a
master or slave. The MASTER and CLKMOD bits in the SPI global control register 1 (SPIGCR1) must be
set to 1 for SPI to function as a master and cleared to 0 for SPI to function as a slave."

tms320dm365.pdf page 162, section "6.15 Serial Port Interface (SPI)": "Master and Slave mode operation is supported on all SPI ports (master mode means that DM365
provides the serial clock)".

What is wrong?

I can't understand what modes are supported by each of SPI controllers (SPI0-SPI4).