TDA3: GEL file modification guide for single 16bit memory

Sung-IL

Part Number: TDA3

Dear Champs,

My customer developed custom board only with single 16bit DDR3L memory(without ECC), and want to modify EVM GEL file for it.

Could you please provide guide where they should modify EVM GEL file for their custom board?

My customer's custom board has only 16bit DDR3L memory attached to DDR0 and DDR1 of TDA3.

When they tried to run EVM GEL file, they faced 'HW leveling time-out' error message and failed to load 'qspi flashing' program.

I think this issue caused by different DDR3L memory configuration with EVM and they requested to get guide how they should modify GEL file for single 16bit DDR3L memory.

Please provide your guide how EVM GEL file should be modified for single 16bit DDR3L memory.

Thanks and Best Regards,

SI.

over 6 years ago

0 Alex Bashkov over 6 years ago

TI__Genius 13550 points

Hello Sung,

We will ping gel/ddr experts for further assistance. Just a quick reply, I had a glance in the TDA3xx_ddr_config.gel found in ccs_base\emulation\gel\TDA3x\ folder. The developers have clearly noted in there that "HW leveling time-out" error happens when ENABLE_ECC is configured to 0x1 but there are no ECC memories. Can you first make sure the you have not enabled ECC memories in your gel copy?

thanks,
Alex

0 Rishabh Garg over 6 years ago

TI__Guru 55685 points

Hi SI,

You can call EMIF1_Enable_Narrow_Mode API from gel scripts to set 16 bit mode. In case the DDR part is different from EVM, the timing calculations will change and corresponding changes will be needed in the DDR gel script.

Regards,
Rishabh

0 Sung-IL over 6 years ago in reply to Alex Bashkov

TI__Mastermind 30890 points

Hi Alex,

Yes. I confirmed 'ENABLE_ECC' = '0' in my GEL file.

Thanks and Best Regards,
SI.

0 Sung-IL over 6 years ago in reply to Sung-IL

TI__Mastermind 30890 points

Hi Rishabh,

Thanks for this information!
In this case, how I can make HW leveling?
As I said, they faced 'HW leveling time-out' error at GEL initialization and it seemed HW leveling was not called in the EMIF1_Enable_Narrow_Mode.

When I tried to run 'EMIF_DDR3_UpdateHWLevelOutput_EMIF1' script, I found below GEL output.

Is this OK? Do they need to run HW leveling again after EMIF1_Enable_Narrow_Mode script and is it right to run 'EMIF_DDR3_UpdateHWLevelOutput_EMIF1' script for HW leveling again?

~~~~~~~~~~~~~~~~
Cortex_M4_IPU1_C0: GEL Output: Updating slave ratios in PHY_STATUSx registers
Cortex_M4_IPU1_C0: GEL Output: as per HW leveling output
Cortex_M4_IPU1_C0: GEL Output: HW leveling is now disabled. Using slave ratios from
Cortex_M4_IPU1_C0: GEL Output: PHY_STATUSx registers

Thanks and Best Regards,
SI.

0 Rishabh Garg over 6 years ago in reply to Sung-IL

TI__Guru 55685 points

Hi SI,

It should be ok to run HW leveling. I will check with DDR expert for confirmation on the same.
Are you facing any issues if you run again?

Regards,
Rishabh

0 Sung-IL over 6 years ago in reply to Rishabh Garg

TI__Mastermind 30890 points

I have not got any feedback from my customer yet. I just want to check right procedure while my customer is trying it on their custom board.

Thanks and Best Regards,
SI.

0 Rishabh Garg over 6 years ago in reply to Sung-IL

TI__Guru 55685 points

Hi SI,

Are they using the same DDR part as is present on the EVM in 16 bit mode or they have a different DDR part?

Regards,
Rishabh

0 Sung-IL over 6 years ago in reply to Rishabh Garg

TI__Mastermind 30890 points

Hi Rishabh,

Yes. they are using same DDR3L memory part - MT41K128M16JT-125

Thanks and Best Regards,
SI.

0 Rishabh Garg over 6 years ago in reply to Sung-IL

TI__Guru 55685 points

Hi SI,

The correct sequence should be:
1. On Target Connect
2. Set Narrow Mode
3. Run HW Leveling

Regards,
Rishabh

0 Rishabh Garg over 6 years ago in reply to Rishabh Garg

TI__Guru 55685 points

Hi,

I haven't heard back from you, I'm assuming you were able to resolve your issue.
If not, just post a reply below (or create a new thread if the thread has locked due to time-out).

Regards,
Rishabh

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TDA3: GEL file modification guide for single 16bit memory