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Compiler/TMDSEVM6657: SPI NOR Boot on EVM6657 with DDR3 Initilization

Part Number: TMDSEVM6657

Tool/software: TI C/C++ Compiler

Hello,

I need to boot from SPI NOR flash on the EVM with DDR3 initialization.  I have tried this:

processors.wiki.ti.com/.../File:C6657_directROM_Boot_example.zip

However, the romparse utility crashes and the DDR3 does not read or write correctly when I use an alternate utility (bootbuild).

I am using CCS 8.2.0 and the associated pdk tools for this version.

Is there an updated set of tools that would allow me to access EVM DDR3 by booting from SPI NOR.

Thanks!

Mike

  • Mike,

    I tried the  you mentioned and I didn't see any problem.

    Below are my major steps guided by the C6657\SPIboot_ddr\docs

    1. I used below CCS/CGT (as you used CCS 8.2) and C6657 PDK (latest):

    set C6000_FOLDER=C:\ti\ccs_8_2_0\ccsv8\tools\compiler\ti-cgt-c6000_8.2.4
    set PDK_PACKAGES=C:\ti\pdk_c665x_2_0_12\packages

    2. After gmake, I got spiboot.out

    3. In the file conversion using spiboot.bat, I used: set IBL_UTIL=C:\ti\pdk_c665x_2_0_12\packages\ti\boot\ibl\src\util  

    Some issues for me were that my computer is Windows 10, 64-bit and several utilities under pdk_c665x_2_0_12\packages\ti\boot\ibl\src\util\btoccs didn't run, there were no executable available: b2ccs and ccs2bin. Those were old toolsets not well maintained in the Processor SDK RTOS.

    I found old MCSDK 2.1.2.6 C6657 and copied both executable from there. Then I can finished the conversion process. 

    4. Note you need to manually edit spirom_le_swap.dat file offset 0x1F 0x0000f401 before you flash it to NOR.

    5. I can boot from NOR and verify the DDR access without GEL.

    Given you have some tool problem, are you able to find the MCSDK 2.1.2.6? I also attached the two utilities I mentioned if you want to use, then you can move forward.

    Regards, Eric4048.btoccs.zip

      

  • Hello Eric,

    Could you send me a link to the MCSDK 2.1.2.6 SDK?

    Thanks!

    Mike
  • Mike,

    Here is the old MCSDK 2.1.2.6 download link: software-dl.ti.com/.../index_FDS.html

    But be aware of that the MCSDK 2.1.2.6 was developed many years ago and obsolete. It was replaced by Processor SDK RTOS. Using two packages may cause some confusion and maintenance burden, you may refer to the old toolset under mcsdk_2_01_02_06\tools\boot_loader\ibl\src\util\btoccs for your purpose.

    Another approach is to rebuild the utility binaries following the pdk_c665x_2_0_12\packages\ti\boot\ibl\doc\build_instructions.txt. The instructions meant to build the IBL, those utilities were built in the early stage of build process. This document needs to be updated to capture the toolset changes, the build process may finally came into trouble, but those utilities under pdk_c665x_2_0_12\packages\ti\boot\ibl\src\util\btoccs still be built properly.

    Regards, Eric

  • Hello,

    So I am still struggling after trying the steps listed above.  I do have some questions:

    1. It appears that the SPI_NOR_Example document you need to modifiy the spi_swap_le.dat and then program it into the NOR flash.  However, the instructions for the NOR SPI writer program (the writer mentioned in the document as well as the programmer used in the rtos sdk verions 5.01.00.10) both appear to want to modify the bin files.  Which is the correct file type (.bin or .dat) for programming the flash using the NOR writers?

    2.  I want to execute code out of DDR3.  So I created a added some lines to the .cfg file in CCS:

    Program.sectMap[".txtddr"] = new Program.SectionSpec();
    Program.sectMap[".txtddr"].loadSegment = "DDR3";

    and I also added some pragmas to my program:

    #pragma CODE_SECTION(".txtddr")
    bool_t Uart::getChar(char_t& ch)
    {

    However, when I run the the ccs2bin utility:

    ccs2bin -swap i2crom.ccs spirom_le_swap.bin

    It just keeps running.  When a break the utility using control C the generated spirom_le_swap.bin file is megabytes in size.

    Question:

    Is it possible to execute out of DDR3 booting of SPI NOR flash using RBL?  I am wondering if RBL actually copies any code from SPI NOR into the DDR3 code segment.  If not, how can I execute code out of DDR3 when I am booting out of SPI NOR.

    Mike

  • Mike,

    To answer your questions:

    1) the .dat is for loading into CCS. .bin is the binary file. the .bin is expected to be loaded by nor writer.

    C:\ti\pdk_c665x_2_0_12\packages\ti\boot\writer\nor\evmc6657l\bin\nor_writer_input.

    You need to copy it over and rename it to app.bin.

    2) you can modify ccs2bin to allocate a big memory for conversion.

    Source code is here:
    C:\ti\pdk_c665x_2_0_12\packages\ti\boot\ibl\src\util\btoccs

    #define SIZE 0x200000 /* max array size */

    This is a windows offline utility. Feel free to modify it.

    Yes, that is the whole purpose. RBL will check if there is value in DDR configuration table and if it is, then initialize DDR first and then you can run your code in DDR directly.

    best regards,
    David Zhou
  • Mike,

    For your application while you have a lot of data in DDR, b2ccs.c needs to be improved. Currently it reads one character at a time and that is why it was slow. This utility was developed before the direct RBL boot without IBL so definitely needs to be improved. you can modify it to read a trunk of data for process. Then it will be faster. Source code is here:

    C:\ti\pdk_c665x_2_0_12\packages\ti\boot\ibl\src\util\btoccs

    regards,
    David
  • Mike,

    Regarding you need to write the .dat or .bin file to NOR:

    I tried to write .dat file, before that I load the data into DDR from address 0x8000_0000 via CCS, then use the NOR FLASH writer to write it (the writer parses the .dat file defined by nor_writer_input.txt and determines the data length). The write is successful and NOR boot to initialize the DDR is successful.

    From source code, the writer itself uses the write buffer at 0x8000_0000 and read it back to buffer 0x8040_0000 for verification.

    I also tried write .bin file (with binary editor to change 0x51 to 0x00). But after NOR boot, the DDR is not useable. I will look it further next week and expect some update middle or late next week as I am travelling.

    For now, please use the .dat file and load to CCS address 0x8000_0000 then run the NOR flash writer.

    Regards, Eric
  • Hello Eric and David,

    I have noticed that when I run romparse (from MCSDK 2_01_02_06) I have the following output (i2crom.ccs) on the first line:

    1651 1 10000 1 17d3f0f3

    Note that the fifth parameter is the size which is incorrect (too large)

    The input to romparse (as specified in nysh.spi.map) is spiboot.i2c.ccs which has the first line:

    1651 1 10000 1 9c1e

    Note that the fifth parameter is considerably less and a more realistic size.  In looking at the romparse source code, the size is intended to be derived from the first line of the input file.

    It should be noted that this error occurs when I add:

    #pragma CODE_SECTION(".txtddr")

    to some sections of my C++ application.  However, when I add the pragma to other sections of my application, the output from romparse is of normal size.

    I strongly suspect that there is a major bug in romparse.  Any ideas on how to resolve this?

    Mike

  • Mike,

    Is that correct if you add pragma for sections in C code application, the output size of romparse is normal? But when you do the same in C++ application, the output size is error-nous large? Do you have a small application project share with us to reproduce the issue?

    Regards, Eric
  • Hello Eric,

    I have not tried the CODE_SECTION pragmas in a C program.  Just C++.

    That being said, yesterday I went back to the aforementioned bootbuild utility that was meant to replace romparse and was able to get initialization, code execution and data variable assignment working from the DD3 SDRAM.  This was done using using #pragma CODE_SECTION and #pragma DATA_SECTION respectively in C++.  The romparse utility that was included in the latest MCSDK and in source code form in the latest PDK has some obvious bugs in CreateFile() when I built the utility from source code and went single stepping through it in a debugging environment.

    As of right now, I would consider this issue closed since I am able to get DDR3 SDRAM working.

    Mike