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OMAP-L138: Question about USB 2.0 Port bus failure during ESD testing

Part Number:

We are experiencing an ESD failure with OMAPL138 USB2.0 port in host mode. Here are some details about the failure:

  • An ESD pulse is applied near the USB connector when OMAPL138 USB2 host port is connected to a single USB slave device.
  • The USB peripheral becomes unresponsive when the failure occurs, however, the peripheral can recover and continue functioning properly if we:
    • Disconnect and reconnect the slave device from the host port.
    • Perform a H/W reset of OMAP-L138
  • When the failure occurs we observe that the D+ is held low, however we have observed the following:
  • The failure only seems to occur when the bus is idle. If the ESD strike is applied while there are on-going IN/OUT transactions on the bus the failure does not occur.
  • When the bus is idle and an ESD strike is applied between SOFs, then the failure occurs however the D+ line does not go low until the next SOF time period.

Questions:

  1. Is there any register with OMAP-L138 that we can query to determine the status of D+? We're looking for a S/W mechanism to detect when this failure occurs.
  2. Is there any mechanism in place on OMAP-L138 USB2.0 transceiver to detect an ESD or high voltage condition on the D+ line at the next SOF slot?

Thanks

  • rperezti said:

    Part Number: OMAP-L138

    Questions:

    1. Is there any register with OMAP-L138 that we can query to determine the status of D+? We're looking for a S/W mechanism to detect when this failure occurs.
    2. Is there any mechanism in place on OMAP-L138 USB2.0 transceiver to detect an ESD or high voltage condition on the D+ line at the next SOF slot?

    1. There are no memory mapped registers for examining the USB PHY state by S/W on OMAP-L138.
    2. There is no mechanism within the USB PHY to detect an ESD event or high voltage condition on the pins. It is possible that the ESD strike is inducing an error in the USB PHY logic, causing the PHY to drive D+ low on the next SOF period.

  • Hello,

    Thank you for sharing the solution.

    Regards,
    Pavel