DRA71XEVM: LCARD reference design: TPS65919 and TPS51200 questions

Peter Li79

Part Number: DRA71XEVM
Other Parts Discussed in Thread: TPS51200

Hi,

in LCARD design, DDR Domain of DRA71x is powered by TPS65919, DDR system is powered by TPS51200.

The GPIO_5 of TPS65919 is used to control the output enable of TPS51200. Do we have the timing diagram containing the this GPIO?

Can we just use this GPIO5 of TPS65919 as the output enable control of DDR-VTT?

Thanks.

over 6 years ago

0 Karthik Ramanan over 6 years ago

TI__Guru** 113810 points

Hi Peter,

Just to be sure, can you please provide me the link to the document that you are referring to?
I would like to double check and get back to you.

Regards
Karthik

0 Bill McCracken over 6 years ago

TI__Expert 6965 points

J6Entry_Info_Ref_Bd_LCARD_SoC_PDN_v0.11.pdfThe LCARD PDN does use the TPS51200 to generate DDR-VTT as you've said. However, the TPS51200 enable input is connected to a pull-up resistor referenced to the VSW_3V3 supply. This supply is energized by the PMIC_EN control signal that is also connected to the TPS65919's GPIO_5 input that enables the '919 PMIC. The '919 PMIC's OTP settings map the GPIO_5 pin to be used as the POWERHOLD function which is used as the enable input.

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DRA71XEVM: LCARD reference design: TPS65919 and TPS51200 questions