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66AK2H12: What is the difference of address expansion function for LPAE(Large Physical Address Extensions) and MPAX

Kz777
Expert 7895 points
Part Number: 66AK2H12

Hi Champs,

I would like to confirm the difference LPAE and MPAX.

Those function is address expansion. We would like to know these difference.

LPAE is ARM provided function. On the other hand, MPAX has address expansion on the Privilege ID=8 (ARM core).

Here is my understand.

*LPAE is for instruction read fetch  from the ARM

*MPAX is for data RW by DMA

Does our understanding a correct ?

Regards,

Kz777

I found "MPAX" explain bellow. So we thought MPAX is mainly  above expectation.

This 2.4.1 Cache coherence Operation mentioned

"Software has the ability to control which memory regions are shared among certain sets of coherent masters using ARM MMU (in ARM CorePac) and using SMS_MPAXH or SES_MPAXH register for EDMA/IO peripherals. Software should ensure that the shareability mappings between the types of masters are consistent to avoid unexpected behavior."

Page 83,

Table 8-7 shows the privilege ID of each C66x CorePac and every mastering peripheral. The table also shows the privilege level (supervisor vs. user), security level (secure vs. nonsecure), and access type (instruction read vs. data/DMA read or write) of each master on the device. In some cases, a particular setting depends on software being executed at the time of the access or the configuration of the master peripheral.

  • 0
    TI__Guru**** 161600 points
    Hi,

    Both are address extension units. LPAE is part of the ARM architecture, while MPAX is part of the MSMC unit in TI Keystone devices, see Section 2.2 Memory Protection and Address Extension (MPAX) from the MSMC user Guide:
    "The MSMC module MPAX supports an external memory addressing space of up to 32 GBytes addressable with a 36-bit address, even though the SoC addressing remains at 32-bits. Some KeyStone II devices (see device-specific data sheet) can support only up to 8 GBytes of external memory space. The C66x CorePac uses its own MPAX units to extend 32-bit addresses to 36-bit addresses before presenting them to the MSMC module. The ARM CorePac can optionally use the MMU with LPAE (Large Physical Address Extension) to support 40 bit physical addressing. However the 4 MSBs of the physical address should be set to 0x0 in KeyStone II devices in the ARM MMU.The slave interfaces on the MSMC that receive addresses from all other masters in the system must extend the address inside the MSMC. These interfaces also provide support for memory protection for accesses from system masters to MSMC SRAM, external memory, and memory-mapped registers in the EMIF. Both system slave interfaces (SES and SMS) feature an MPAX unit similar to the MPAX unit inside the C66x CorePac that combines these functions. "

    Best Regards,
    Yordan