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AM4372: About DDR3 Layout and Timing setting issue

Part Number: AM4372

Hi Sir 

We did DDR test and found below test failed issue in high 16bit.

And we reviewed our layout and found the DDR fly-by is in contrast like below.

In normal, U20 should be close to CPU. But our design is U21 be close to CPU.

Do you have any suggestion about how to modify DDR3 parameters like write-leveling ?

BR

Yimin