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I want to connect DM355 with a FPGA using VPFE ITU_R.BT.656 interface of VPFE.
I use CCDC & IPIPE to resize a input size 720*576 to 432*240 ,
But now I have got one problem is that when the input video is moving there are some errs:
the right pic is :
the pic is mov form left down to right up.
I donnot know why these happened .
Hi,
This is an artifact due to interlaced input. The fields are captured at different times and hence you are seeing an artifact in the altenate fields. If you want to do a resize, you can use one field (720x240) and then resize to your required resolution. It will take care of removing such artifact.
Regards,
Anshuman
The more appropriate option is you should use a de-interlacer. DM355 does not have hardware de-interlacer, so you would have to use de-interlacer in software.
Regards,
Anshuman
I set reg g_pVpssBufLogic->INTSEL = 5<<0 , use osdint , when interrupt happened ,
I read MODESET.FLDSTAT & I found that only one odd field evey three even field , I think it should be one odd field by one even filed .
And, Could you help me how to de-interlace by software?
Hi,
I am little confused now. Are you seeing the artifact on the TV or on the captured frame on DDR? If it is on TV, then please tell me if you see the artifact after resizing?
For de-interlacer software, I think you would have to contact the TI FAE team. It does not come as part of DVSDK.
Regards,
Anshuman
Hello,
We tried to analyze the data again and your experiment of resizing to 432x288, but i dont think hardware IPIPE/Resizer can cause such a problem. I think it is the way Resizer is configured from the driver which can be causing this problem.
Can you please share the input YUV data (720x576), output YUV data from IPIPE (both good as well as bad data)(432x288 and 432x240) and possibly the IPIPE and IPIPEIF register values when this problem occurs?
Have you written your own testcase or is it some DVSDK demo?
Regards,
Anshuman
Hello, Anshuman,
My program is from our agent , It was migrate from linux to wince. I cannt get the bad data . I can share my promgram as below .
And , I donnot know where can I get DM355 DVSDK demo,Can you give me a hint?
I set IPIPE in "BOOL VideoHW_Open(void)" and software sacle program is use asm.(extern "C" void Scale288Buff(unsigned char *sbuf,unsigned char *dbuf); )
//
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
/*
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
*/
#ifndef _VIDEO_HW_H_
#define _VIDEO_HW_H_
#define LCD_PHY_PIXEL_CX 240
#define LCD_PHY_PIXEL_CY 432
#define CCDC_BURST_SLOP 32
#define CAP_BUFF_SIZE LCD_PHY_PIXEL_CX*LCD_PHY_PIXEL_CY*2+CCDC_BURST_SLOP
#define SOURCE_WIDTH_NTSC 720
#define SOURCE_HEIGHT_NTSC 480
#define SOURCE_WIDTH_PAL 720
#define SOURCE_HEIGHT_PAL 576
#define SOURCE_HEIGHT_PAL_TEST 576
//
#define CCDC_VDINT4 4
#define CCDC_VDINT0 0
#define CCDC_VDINT1 1
#define CCDC_VDINT2 2
#define H3AINT 3
#define VENCINT 4
#define OSDINT 5
#define IPIPEIFINT 6
#define IPIPE_INT0_HST 7
#define IPIPE_INT1_SDR 8
#define IPIPE_INT2_RZA 9
#define IPIPE_INT3_RZB 10
#define IPIPE_INT4_BSC 11
#define IPIPE_INT5_MMR 12
#define CFALDINT 13
#define HSSIINT 14
#define VPSS_INTSEL0_SHIFT 0
#define VPSS_INTSEL1_SHIFT 4
#define VPSS_INTSEL2_SHIFT 8
#define VPSS_INTSEL3_SHIFT 12
#define VPSS_INTSEL4_SHIFT 16
#define VPSS_INTSEL5_SHIFT 20
#define VPSS_INTSEL6_SHIFT 24
#define VPSS_INTSEL7_SHIFT 28
#define VPSS_INTSEL8_SHIFT 0
#define RDRV_RESZ_SPEC__MAX_SLICES 32
#define IPIPEIF_CFG_CLKDIV_ONE_HALF (0x0000u)
#define IPIPEIF_CFG_CLKDIV_ONE_THIRD (0x0001u)
#define IPIPEIF_CFG_CLKDIV_ONE_FOURTH (0x0002u)
#define IPIPEIF_CFG_CLKDIV_ONE_FIFTH (0x0003u)
#define IPIPEIF_CFG_CLKDIV_ONE_SIXTH (0x0004u)
#define IPIPEIF_CFG_CLKDIV_ONE_EIGHTH (0x0005u)
#define IPIPEIF_CFG_CLKDIV_ONE_SIXTEENTH (0x0006u)
#define IPIPEIF_CFG_CLKDIV_ONE_THIRTYSECOND (0x0007u)
//ccdc confige
#define CSL_CCDC_SYNCEN_WEN_MASK (0x0002u)
#define CSL_CCDC_SYNCEN_WEN_SHIFT (0x0001u)
#define CSL_CCDC_SYNCEN_WEN_RESETVAL (0x0000u)
/*----WEN Tokens----*/
#define CSL_CCDC_SYNCEN_WEN_DISABLE (0x0000u)
#define CSL_CCDC_SYNCEN_WEN_ENABLE (0x0001u)
#define CSL_CCDC_SYNCEN_VDHDEN_MASK (0x0001u)
#define CSL_CCDC_SYNCEN_VDHDEN_SHIFT (0x0000u)
#define CSL_CCDC_SYNCEN_VDHDEN_RESETVAL (0x0000u)
/*----VDHDEN Tokens----*/
#define CSL_CCDC_SYNCEN_VDHDEN_DISABLE (0x0000u)
#define CSL_CCDC_SYNCEN_VDHDEN_ENABLE (0x0001u)
#define CSL_CCDC_SYNCEN_RESETVAL (0x0000u)
/* MODESET */
#define CSL_CCDC_MODESET_FLDSTAT_MASK (0x8000u)
#define CSL_CCDC_MODESET_FLDSTAT_SHIFT (0x000Fu)
#define CSL_CCDC_MODESET_FLDSTAT_RESETVAL (0x0000u)
/*----FLDSTAT Tokens----*/
#define CSL_CCDC_MODESET_FLDSTAT_ODDFIELD (0x0000u)
#define CSL_CCDC_MODESET_FLDSTAT_EVENFIELD (0x0001u)
#define CSL_CCDC_MODESET_LPF_MASK (0x4000u)
#define CSL_CCDC_MODESET_LPF_SHIFT (0x000Eu)
#define CSL_CCDC_MODESET_LPF_RESETVAL (0x0000u)
/*----LPF Tokens----*/
#define CSL_CCDC_MODESET_LPF_OFF (0x0000u)
#define CSL_CCDC_MODESET_LPF_ON (0x0001u)
#define CSL_CCDC_MODESET_INPMOD_MASK (0x3000u)
#define CSL_CCDC_MODESET_INPMOD_SHIFT (0x000Cu)
#define CSL_CCDC_MODESET_INPMOD_RESETVAL (0x0002u)
/*----INPMOD Tokens----*/
#define CSL_CCDC_MODESET_INPMOD_CCDRAW (0x0000u)
#define CSL_CCDC_MODESET_INPMOD_YCBCR16 (0x0001u)
#define CSL_CCDC_MODESET_INPMOD_YCBCR8 (0x0002u)
#define CSL_CCDC_MODESET_INPMOD_RESERVED (0x0003u)
#define CSL_CCDC_MODESET_PACK8_MASK (0x0800u)
#define CSL_CCDC_MODESET_PACK8_SHIFT (0x000Bu)
#define CSL_CCDC_MODESET_PACK8_RESETVAL (0x0000u)
/*----PACK8 Tokens----*/
#define CSL_CCDC_MODESET_PACK8_NORMAL_16_BITS_PIXEL (0x0000u)
#define CSL_CCDC_MODESET_PACK8_PACK_8_BITS_PIXEL (0x0001u)
#define CSL_CCDC_MODESET_DATASFT_MASK (0x0700u)
#define CSL_CCDC_MODESET_DATASFT_SHIFT (0x0008u)
#define CSL_CCDC_MODESET_DATASFT_RESETVAL (0x0000u)
/*----DATASFT Tokens----*/
#define CSL_CCDC_MODESET_DATASFT_NO_SHIFT (0x0000u)
#define CSL_CCDC_MODESET_DATASFT__1_BIT (0x0001u)
#define CSL_CCDC_MODESET_DATASFT__2_BITS (0x0002u)
#define CSL_CCDC_MODESET_DATASFT__3_BITS (0x0003u)
#define CSL_CCDC_MODESET_DATASFT__4_BITS (0x0004u)
#define CSL_CCDC_MODESET_DATASFT__5_BITS (0x0005u)
#define CSL_CCDC_MODESET_DATASFT__6_BITS (0x0006u)
#define CSL_CCDC_MODESET_DATASFT_RESERVED (0x0007u)
#define CSL_CCDC_MODESET_FLDMODE_MASK (0x0080u)
#define CSL_CCDC_MODESET_FLDMODE_SHIFT (0x0007u)
#define CSL_CCDC_MODESET_FLDMODE_RESETVAL (0x0000u)
/*----FLDMODE Tokens----*/
#define CSL_CCDC_MODESET_FLDMODE_NON_INTERLACED (0x0000u)
#define CSL_CCDC_MODESET_FLDMODE_INTERLACED (0x0001u)
#define CSL_CCDC_MODESET_DATAPOL_MASK (0x0040u)
#define CSL_CCDC_MODESET_DATAPOL_SHIFT (0x0006u)
#define CSL_CCDC_MODESET_DATAPOL_RESETVAL (0x0000u)
/*----DATAPOL Tokens----*/
#define CSL_CCDC_MODESET_DATAPOL_NORMAL (0x0000u)
#define CSL_CCDC_MODESET_DATAPOL_ONES_COMPLEMENT (0x0001u)
#define CSL_CCDC_MODESET_EXWEN_MASK (0x0020u)
#define CSL_CCDC_MODESET_EXWEN_SHIFT (0x0005u)
#define CSL_CCDC_MODESET_EXWEN_RESETVAL (0x0000u)
/*----EXWEN Tokens----*/
#define CSL_CCDC_MODESET_EXWEN_NO_EXTERNAL_WEN (0x0000u)
#define CSL_CCDC_MODESET_EXWEN_EXTERNAL_WEN (0x0001u)
#define CSL_CCDC_MODESET_FLDPOL_MASK (0x0010u)
#define CSL_CCDC_MODESET_FLDPOL_SHIFT (0x0004u)
#define CSL_CCDC_MODESET_FLDPOL_RESETVAL (0x0000u)
/*----FLDPOL Tokens----*/
#define CSL_CCDC_MODESET_FLDPOL_POSITIVE (0x0000u)
#define CSL_CCDC_MODESET_FLDPOL_NEGATIVE (0x0001u)
#define CSL_CCDC_MODESET_HDPOL_MASK (0x0008u)
#define CSL_CCDC_MODESET_HDPOL_SHIFT (0x0003u)
#define CSL_CCDC_MODESET_HDPOL_RESETVAL (0x0000u)
/*----HDPOL Tokens----*/
#define CSL_CCDC_MODESET_HDPOL_POSITIVE (0x0000u)
#define CSL_CCDC_MODESET_HDPOL_NEGATIVE (0x0001u)
#define CSL_CCDC_MODESET_VDPOL_MASK (0x0004u)
#define CSL_CCDC_MODESET_VDPOL_SHIFT (0x0002u)
#define CSL_CCDC_MODESET_VDPOL_RESETVAL (0x0000u)
/*----VDPOL Tokens----*/
#define CSL_CCDC_MODESET_VDPOL_POSITIVE (0x0000u)
#define CSL_CCDC_MODESET_VDPOL_NEGATIVE (0x0001u)
#define CSL_CCDC_MODESET_VDHDOUT_MASK (0x0001u)
#define CSL_CCDC_MODESET_VDHDOUT_SHIFT (0x0000u)
#define CSL_CCDC_MODESET_VDHDOUT_RESETVAL (0x0000u)
/*----VDHDOUT Tokens----*/
#define CSL_CCDC_MODESET_VDHDOUT_INPUT (0x0000u)
#define CSL_CCDC_MODESET_VDHDOUT_OUTPUT (0x0001u)
#define CSL_CCDC_MODESET_RESETVAL (0x2000u)
/* HDWIDTH */
#define CSL_CCDC_HDWIDTH_HDW_MASK (0x0FFFu)
#define CSL_CCDC_HDWIDTH_HDW_SHIFT (0x0000u)
#define CSL_CCDC_HDWIDTH_HDW_RESETVAL (0x0000u)
#define CSL_CCDC_HDWIDTH_RESETVAL (0x0000u)
/* VDWIDTH */
#define CSL_CCDC_VDWIDTH_VDW_MASK (0x0FFFu)
#define CSL_CCDC_VDWIDTH_VDW_SHIFT (0x0000u)
#define CSL_CCDC_VDWIDTH_VDW_RESETVAL (0x0000u)
#define CSL_CCDC_VDWIDTH_RESETVAL (0x0000u)
/* PPLN */
#define CSL_CCDC_PPLN_PPLN_MASK (0xFFFFu)
#define CSL_CCDC_PPLN_PPLN_SHIFT (0x0000u)
#define CSL_CCDC_PPLN_PPLN_RESETVAL (0x0000u)
#define CSL_CCDC_PPLN_RESETVAL (0x0000u)
/* LPFR */
#define CSL_CCDC_LPFR_LPFR_MASK (0xFFFFu)
#define CSL_CCDC_LPFR_LPFR_SHIFT (0x0000u)
#define CSL_CCDC_LPFR_LPFR_RESETVAL (0x0000u)
#define CSL_CCDC_LPFR_RESETVAL (0x0000u)
/* SPH */
#define CSL_CCDC_SPH_SPH_MASK (0x7FFFu)
#define CSL_CCDC_SPH_SPH_SHIFT (0x0000u)
#define CSL_CCDC_SPH_SPH_RESETVAL (0x0000u)
#define CSL_CCDC_SPH_RESETVAL (0x0000u)
/* NPH */
#define CSL_CCDC_NPH_NPH_MASK (0x7FFFu)
#define CSL_CCDC_NPH_NPH_SHIFT (0x0000u)
#define CSL_CCDC_NPH_NPH_RESETVAL (0x0000u)
#define CSL_CCDC_NPH_RESETVAL (0x0000u)
/* SLV0 */
#define CSL_CCDC_SLV0_SLV0_MASK (0x7FFFu)
#define CSL_CCDC_SLV0_SLV0_SHIFT (0x0000u)
#define CSL_CCDC_SLV0_SLV0_RESETVAL (0x0000u)
#define CSL_CCDC_SLV0_RESETVAL (0x0000u)
/* SLV1 */
#define CSL_CCDC_SLV1_SLV1_MASK (0x7FFFu)
#define CSL_CCDC_SLV1_SLV1_SHIFT (0x0000u)
#define CSL_CCDC_SLV1_SLV1_RESETVAL (0x0000u)
#define CSL_CCDC_SLV1_RESETVAL (0x0000u)
/* NLV */
#define CSL_CCDC_NLV_NLV_MASK (0x7FFFu)
#define CSL_CCDC_NLV_NLV_SHIFT (0x0000u)
#define CSL_CCDC_NLV_NLV_RESETVAL (0x0000u)
#define CSL_CCDC_NLV_RESETVAL (0x0000u)
/* CULH */
#define CSL_CCDC_CULH_CULHEVN_MASK (0xFF00u)
#define CSL_CCDC_CULH_CULHEVN_SHIFT (0x0008u)
#define CSL_CCDC_CULH_CULHEVN_RESETVAL (0x00FFu)
#define CSL_CCDC_CULH_CULHODD_MASK (0x00FFu)
#define CSL_CCDC_CULH_CULHODD_SHIFT (0x0000u)
#define CSL_CCDC_CULH_CULHODD_RESETVAL (0x00FFu)
#define CSL_CCDC_CULH_RESETVAL (0xFFFFu)
/* CULV */
#define CSL_CCDC_CULV_CULV_MASK (0x00FFu)
#define CSL_CCDC_CULV_CULV_SHIFT (0x0000u)
#define CSL_CCDC_CULV_CULV_RESETVAL (0x00FFu)
#define CSL_CCDC_CULV_RESETVAL (0x00FFu)
/* HSIZE */
#define CSL_CCDC_HSIZE_ADR_UPDT_MASK (0x1000u)
#define CSL_CCDC_HSIZE_ADR_UPDT_SHIFT (0x000Cu)
#define CSL_CCDC_HSIZE_ADR_UPDT_RESETVAL (0x0000u)
/*----ADR_UPDT Tokens----*/
#define CSL_CCDC_HSIZE_ADR_UPDT_INCREMENT (0x0000u)
#define CSL_CCDC_HSIZE_ADR_UPDT_DECREMENT (0x0001u)
#define CSL_CCDC_HSIZE_LNOFST_MASK (0x0FFFu)
#define CSL_CCDC_HSIZE_LNOFST_SHIFT (0x0000u)
#define CSL_CCDC_HSIZE_LNOFST_RESETVAL (0x0000u)
#define CSL_CCDC_HSIZE_RESETVAL (0x0000u)
/* SDOFST */
#define CSL_CCDC_SDOFST_FIINV_MASK (0x4000u)
#define CSL_CCDC_SDOFST_FIINV_SHIFT (0x000Eu)
#define CSL_CCDC_SDOFST_FIINV_RESETVAL (0x0000u)
/*----FIINV Tokens----*/
#define CSL_CCDC_SDOFST_FIINV_NONINVERSE (0x0000u)
#define CSL_CCDC_SDOFST_FIINV_INVERSE (0x0001u)
#define CSL_CCDC_SDOFST_FOFST_MASK (0x3000u)
#define CSL_CCDC_SDOFST_FOFST_SHIFT (0x000Cu)
#define CSL_CCDC_SDOFST_FOFST_RESETVAL (0x0000u)
/*----FOFST Tokens----*/
#define CSL_CCDC_SDOFST_FOFST_PLUS_1LINE (0x0000u)
#define CSL_CCDC_SDOFST_FOFST_PLUS_2LINE (0x0001u)
#define CSL_CCDC_SDOFST_FOFST_PLUS_3LINE (0x0002u)
#define CSL_CCDC_SDOFST_FOFST_PLUS_4LINE (0x0003u)
#define CSL_CCDC_SDOFST_LOFTS0_MASK (0x0E00u)
#define CSL_CCDC_SDOFST_LOFTS0_SHIFT (0x0009u)
#define CSL_CCDC_SDOFST_LOFTS0_RESETVAL (0x0000u)
/*----LOFTS0 Tokens----*/
#define CSL_CCDC_SDOFST_LOFTS0_PLUS_1LINE (0x0000u)
#define CSL_CCDC_SDOFST_LOFTS0_PLUS_2LINES (0x0001u)
#define CSL_CCDC_SDOFST_LOFTS0_PLUS_3LINES (0x0002u)
#define CSL_CCDC_SDOFST_LOFTS0_PLUS_4LINES (0x0003u)
#define CSL_CCDC_SDOFST_LOFTS0_MINUS_1LINE (0x0004u)
#define CSL_CCDC_SDOFST_LOFTS0_MINUS_2LINES (0x0005u)
#define CSL_CCDC_SDOFST_LOFTS0_MINUS_3LINES (0x0006u)
#define CSL_CCDC_SDOFST_LOFTS0_MINUS_4LINES (0x0007u)
#define CSL_CCDC_SDOFST_LOFTS1_MASK (0x01C0u)
#define CSL_CCDC_SDOFST_LOFTS1_SHIFT (0x0006u)
#define CSL_CCDC_SDOFST_LOFTS1_RESETVAL (0x0000u)
/*----LOFTS1 Tokens----*/
#define CSL_CCDC_SDOFST_LOFTS1_PLUS_1LINE (0x0000u)
#define CSL_CCDC_SDOFST_LOFTS1_PLUS_2LINES (0x0001u)
#define CSL_CCDC_SDOFST_LOFTS1_PLUS_3LINES (0x0002u)
#define CSL_CCDC_SDOFST_LOFTS1_PLUS_4LINES (0x0003u)
#define CSL_CCDC_SDOFST_LOFTS1_MINUS_1LINE (0x0004u)
#define CSL_CCDC_SDOFST_LOFTS1_MINUS_2LINES (0x0005u)
#define CSL_CCDC_SDOFST_LOFTS1_MINUS_3LINES (0x0006u)
#define CSL_CCDC_SDOFST_LOFTS1_MINUS_4LINES (0x0007u)
#define CSL_CCDC_SDOFST_LOFTS2_MASK (0x0038u)
#define CSL_CCDC_SDOFST_LOFTS2_SHIFT (0x0003u)
#define CSL_CCDC_SDOFST_LOFTS2_RESETVAL (0x0000u)
/*----LOFTS2 Tokens----*/
#define CSL_CCDC_SDOFST_LOFTS2_PLUS_1LINE (0x0000u)
#define CSL_CCDC_SDOFST_LOFTS2_PLUS_2LINES (0x0001u)
#define CSL_CCDC_SDOFST_LOFTS2_PLUS_3LINES (0x0002u)
#define CSL_CCDC_SDOFST_LOFTS2_PLUS_4LINES (0x0003u)
#define CSL_CCDC_SDOFST_LOFTS2_MINUS_1LINE (0x0004u)
#define CSL_CCDC_SDOFST_LOFTS2_MINUS_2LINES (0x0005u)
#define CSL_CCDC_SDOFST_LOFTS2_MINUS_3LINES (0x0006u)
#define CSL_CCDC_SDOFST_LOFTS2_MINUS_4LINES (0x0007u)
#define CSL_CCDC_SDOFST_LOFTS3_MASK (0x0007u)
#define CSL_CCDC_SDOFST_LOFTS3_SHIFT (0x0000u)
#define CSL_CCDC_SDOFST_LOFTS3_RESETVAL (0x0000u)
/*----LOFTS3 Tokens----*/
#define CSL_CCDC_SDOFST_LOFTS3_PLUS_1LINE (0x0000u)
#define CSL_CCDC_SDOFST_LOFTS3_PLUS_2LINES (0x0001u)
#define CSL_CCDC_SDOFST_LOFTS3_PLUS_3LINES (0x0002u)
#define CSL_CCDC_SDOFST_LOFTS3_PLUS_4LINES (0x0003u)
#define CSL_CCDC_SDOFST_LOFTS3_MINUS_1LINE (0x0004u)
#define CSL_CCDC_SDOFST_LOFTS3_MINUS_2LINES (0x0005u)
#define CSL_CCDC_SDOFST_LOFTS3_MINUS_3LINES (0x0006u)
#define CSL_CCDC_SDOFST_LOFTS3_MINUS_4LINES (0x0007u)
#define CSL_CCDC_SDOFST_RESETVAL (0x0000u)
/* STADRH */
#define CSL_CCDC_STADRH_ADRH_MASK (0x007Fu)
#define CSL_CCDC_STADRH_ADRH_SHIFT (0x0000u)
#define CSL_CCDC_STADRH_ADRH_RESETVAL (0x0000u)
#define CSL_CCDC_STADRH_RESETVAL (0x0000u)
/* STADRL */
#define CSL_CCDC_STADRL_STADRL_MASK (0xFFFFu)
#define CSL_CCDC_STADRL_STADRL_SHIFT (0x0000u)
#define CSL_CCDC_STADRL_STADRL_RESETVAL (0x0000u)
#define CSL_CCDC_STADRL_RESETVAL (0x0000u)
/* CLAMP */
#define CSL_CCDC_CLAMP_CLAMPEN_MASK (0x8000u)
#define CSL_CCDC_CLAMP_CLAMPEN_SHIFT (0x000Fu)
#define CSL_CCDC_CLAMP_CLAMPEN_RESETVAL (0x0000u)
/*----CLAMPEN Tokens----*/
#define CSL_CCDC_CLAMP_CLAMPEN_DISABLE (0x0000u)
#define CSL_CCDC_CLAMP_CLAMPEN_ENABLE (0x0001u)
#define CSL_CCDC_CLAMP_OBSLEN_MASK (0x6000u)
#define CSL_CCDC_CLAMP_OBSLEN_SHIFT (0x000Du)
#define CSL_CCDC_CLAMP_OBSLEN_RESETVAL (0x0000u)
/*----OBSLEN Tokens----*/
#define CSL_CCDC_CLAMP_OBSLEN__2PIXELS (0x0000u)
#define CSL_CCDC_CLAMP_OBSLEN__4PIXELS (0x0001u)
#define CSL_CCDC_CLAMP_OBSLEN__8PIXELS (0x0002u)
#define CSL_CCDC_CLAMP_OBSLEN__16PIXELS (0x0003u)
#define CSL_CCDC_CLAMP_OBST_MASK (0x1FFFu)
#define CSL_CCDC_CLAMP_OBST_SHIFT (0x0000u)
#define CSL_CCDC_CLAMP_OBST_RESETVAL (0x0000u)
#define CSL_CCDC_CLAMP_RESETVAL (0x0000u)
/* DCSUB */
#define CSL_CCDC_DCSUB_OBSLN_MASK (0xC000u)
#define CSL_CCDC_DCSUB_OBSLN_SHIFT (0x000Eu)
#define CSL_CCDC_DCSUB_OBSLN_RESETVAL (0x0000u)
/*----OBSLN Tokens----*/
#define CSL_CCDC_DCSUB_OBSLN__2LINES (0x0000u)
#define CSL_CCDC_DCSUB_OBSLN__4LINES (0x0001u)
#define CSL_CCDC_DCSUB_OBSLN__8LINES (0x0002u)
#define CSL_CCDC_DCSUB_OBSLN__16LINES (0x0003u)
#define CSL_CCDC_DCSUB_DCSUB_MASK (0x3FFFu)
#define CSL_CCDC_DCSUB_DCSUB_SHIFT (0x0000u)
#define CSL_CCDC_DCSUB_DCSUB_RESETVAL (0x0000u)
#define CSL_CCDC_DCSUB_RESETVAL (0x0000u)
/* COLPTN */
#define CSL_CCDC_COLPTN_CPF1P0_MASK (0xC000u)
#define CSL_CCDC_COLPTN_CPF1P0_SHIFT (0x000Eu)
#define CSL_CCDC_COLPTN_CPF1P0_RESETVAL (0x0000u)
/*----CPF1P0 Tokens----*/
#define CSL_CCDC_COLPTN_CPF1P0_R_YE (0x0000u)
#define CSL_CCDC_COLPTN_CPF1P0_GR_CY (0x0001u)
#define CSL_CCDC_COLPTN_CPF1P0_GB_G (0x0002u)
#define CSL_CCDC_COLPTN_CPF1P0_B_MG (0x0003u)
#define CSL_CCDC_COLPTN_CPF1P1_MASK (0x3000u)
#define CSL_CCDC_COLPTN_CPF1P1_SHIFT (0x000Cu)
#define CSL_CCDC_COLPTN_CPF1P1_RESETVAL (0x0000u)
/*----CPF1P1 Tokens----*/
#define CSL_CCDC_COLPTN_CPF1P1_R_YE (0x0000u)
#define CSL_CCDC_COLPTN_CPF1P1_GR_CY (0x0001u)
#define CSL_CCDC_COLPTN_CPF1P1_GB_G (0x0002u)
#define CSL_CCDC_COLPTN_CPF1P1_B_MG (0x0003u)
#define CSL_CCDC_COLPTN_CPF1P2_MASK (0x0C00u)
#define CSL_CCDC_COLPTN_CPF1P2_SHIFT (0x000Au)
#define CSL_CCDC_COLPTN_CPF1P2_RESETVAL (0x0000u)
/*----CPF1P2 Tokens----*/
#define CSL_CCDC_COLPTN_CPF1P2_R_YE (0x0000u)
#define CSL_CCDC_COLPTN_CPF1P2_GR_CY (0x0001u)
#define CSL_CCDC_COLPTN_CPF1P2_GB_G (0x0002u)
#define CSL_CCDC_COLPTN_CPF1P2_B_MG (0x0003u)
#define CSL_CCDC_COLPTN_CPF1P3_MASK (0x0300u)
#define CSL_CCDC_COLPTN_CPF1P3_SHIFT (0x0008u)
#define CSL_CCDC_COLPTN_CPF1P3_RESETVAL (0x0000u)
/*----CPF1P3 Tokens----*/
#define CSL_CCDC_COLPTN_CPF1P3_R_YE (0x0000u)
#define CSL_CCDC_COLPTN_CPF1P3_GR_CY (0x0001u)
#define CSL_CCDC_COLPTN_CPF1P3_GB_G (0x0002u)
#define CSL_CCDC_COLPTN_CPF1P3_B_MG (0x0003u)
#define CSL_CCDC_COLPTN_CPF0P0_MASK (0x00C0u)
#define CSL_CCDC_COLPTN_CPF0P0_SHIFT (0x0006u)
#define CSL_CCDC_COLPTN_CPF0P0_RESETVAL (0x0000u)
/*----CPF0P0 Tokens----*/
#define CSL_CCDC_COLPTN_CPF0P0_R_YE (0x0000u)
#define CSL_CCDC_COLPTN_CPF0P0_GR_CY (0x0001u)
#define CSL_CCDC_COLPTN_CPF0P0_GB_G (0x0002u)
#define CSL_CCDC_COLPTN_CPF0P0_B_MG (0x0003u)
#define CSL_CCDC_COLPTN_CPF0P1_MASK (0x0030u)
#define CSL_CCDC_COLPTN_CPF0P1_SHIFT (0x0004u)
#define CSL_CCDC_COLPTN_CPF0P1_RESETVAL (0x0000u)
/*----CPF0P1 Tokens----*/
#define CSL_CCDC_COLPTN_CPF0P1_R_YE (0x0000u)
#define CSL_CCDC_COLPTN_CPF0P1_GR_CY (0x0001u)
#define CSL_CCDC_COLPTN_CPF0P1_GB_G (0x0002u)
#define CSL_CCDC_COLPTN_CPF0P1_B_MG (0x0003u)
#define CSL_CCDC_COLPTN_CPF0P2_MASK (0x000Cu)
#define CSL_CCDC_COLPTN_CPF0P2_SHIFT (0x0002u)
#define CSL_CCDC_COLPTN_CPF0P2_RESETVAL (0x0000u)
/*----CPF0P2 Tokens----*/
#define CSL_CCDC_COLPTN_CPF0P2_R_YE (0x0000u)
#define CSL_CCDC_COLPTN_CPF0P2_GR_CY (0x0001u)
#define CSL_CCDC_COLPTN_CPF0P2_GB_G (0x0002u)
#define CSL_CCDC_COLPTN_CPF0P2_B_MG (0x0003u)
#define CSL_CCDC_COLPTN_CPF0P3_MASK (0x0003u)
#define CSL_CCDC_COLPTN_CPF0P3_SHIFT (0x0000u)
#define CSL_CCDC_COLPTN_CPF0P3_RESETVAL (0x0000u)
/*----CPF0P3 Tokens----*/
#define CSL_CCDC_COLPTN_CPF0P3_R_YE (0x0000u)
#define CSL_CCDC_COLPTN_CPF0P3_GR_CY (0x0001u)
#define CSL_CCDC_COLPTN_CPF0P3_GB_G (0x0002u)
#define CSL_CCDC_COLPTN_CPF0P3_B_MG (0x0003u)
#define CSL_CCDC_COLPTN_RESETVAL (0x0000u)
/* BLKCMP0 */
#define CSL_CCDC_BLKCMP0_R_YE_MASK (0xFF00u)
#define CSL_CCDC_BLKCMP0_R_YE_SHIFT (0x0008u)
#define CSL_CCDC_BLKCMP0_R_YE_RESETVAL (0x0000u)
#define CSL_CCDC_BLKCMP0_GR_CY_MASK (0x00FFu)
#define CSL_CCDC_BLKCMP0_GR_CY_SHIFT (0x0000u)
#define CSL_CCDC_BLKCMP0_GR_CY_RESETVAL (0x0000u)
#define CSL_CCDC_BLKCMP0_RESETVAL (0x0000u)
/* BLKCMP1 */
#define CSL_CCDC_BLKCMP1_GB_G_MASK (0xFF00u)
#define CSL_CCDC_BLKCMP1_GB_G_SHIFT (0x0008u)
#define CSL_CCDC_BLKCMP1_GB_G_RESETVAL (0x0000u)
#define CSL_CCDC_BLKCMP1_B_MG_MASK (0x00FFu)
#define CSL_CCDC_BLKCMP1_B_MG_SHIFT (0x0000u)
#define CSL_CCDC_BLKCMP1_B_MG_RESETVAL (0x0000u)
#define CSL_CCDC_BLKCMP1_RESETVAL (0x0000u)
/* MEDFILT */
#define CSL_CCDC_MEDFILT_MFTHR_MASK (0x3FFFu)
#define CSL_CCDC_MEDFILT_MFTHR_SHIFT (0x0000u)
#define CSL_CCDC_MEDFILT_MFTHR_RESETVAL (0x0000u)
#define CSL_CCDC_MEDFILT_RESETVAL (0x0000u)
/* RYEGAIN */
#define CSL_CCDC_RYEGAIN_GAIN_MASK (0x07FFu)
#define CSL_CCDC_RYEGAIN_GAIN_SHIFT (0x0000u)
#define CSL_CCDC_RYEGAIN_GAIN_RESETVAL (0x0100u)
#define CSL_CCDC_RYEGAIN_RESETVAL (0x0100u)
/* GRCYGAIN */
#define CSL_CCDC_GRCYGAIN_GAIN_MASK (0x07FFu)
#define CSL_CCDC_GRCYGAIN_GAIN_SHIFT (0x0000u)
#define CSL_CCDC_GRCYGAIN_GAIN_RESETVAL (0x0100u)
#define CSL_CCDC_GRCYGAIN_RESETVAL (0x0100u)
/* GBGGAIN */
#define CSL_CCDC_GBGGAIN_GAIN_MASK (0x07FFu)
#define CSL_CCDC_GBGGAIN_GAIN_SHIFT (0x0000u)
#define CSL_CCDC_GBGGAIN_GAIN_RESETVAL (0x0100u)
#define CSL_CCDC_GBGGAIN_RESETVAL (0x0100u)
/* BMGGAIN */
#define CSL_CCDC_BMGGAIN_GAIN_MASK (0x07FFu)
#define CSL_CCDC_BMGGAIN_GAIN_SHIFT (0x0000u)
#define CSL_CCDC_BMGGAIN_GAIN_RESETVAL (0x0100u)
#define CSL_CCDC_BMGGAIN_RESETVAL (0x0100u)
/* OFFSET */
#define CSL_CCDC_OFFSET_OFFSET_MASK (0x03FFu)
#define CSL_CCDC_OFFSET_OFFSET_SHIFT (0x0000u)
#define CSL_CCDC_OFFSET_OFFSET_RESETVAL (0x0000u)
#define CSL_CCDC_OFFSET_RESETVAL (0x0000u)
/* OUTCLIP */
#define CSL_CCDC_OUTCLIP_OCLIP_MASK (0x3FFFu)
#define CSL_CCDC_OUTCLIP_OCLIP_SHIFT (0x0000u)
#define CSL_CCDC_OUTCLIP_OCLIP_RESETVAL (0x3FFFu)
#define CSL_CCDC_OUTCLIP_RESETVAL (0x3FFFu)
/* VDINT0 */
#define CSL_CCDC_VDINT0_VDINT0_MASK (0x7FFFu)
#define CSL_CCDC_VDINT0_VDINT0_SHIFT (0x0000u)
#define CSL_CCDC_VDINT0_VDINT0_RESETVAL (0x0000u)
#define CSL_CCDC_VDINT0_RESETVAL (0x0000u)
/* VDINT1 */
#define CSL_CCDC_VDINT1_VDINT1_MASK (0x7FFFu)
#define CSL_CCDC_VDINT1_VDINT1_SHIFT (0x0000u)
#define CSL_CCDC_VDINT1_VDINT1_RESETVAL (0x0000u)
#define CSL_CCDC_VDINT1_RESETVAL (0x0000u)
/* RSV0 */
#define CSL_CCDC_RSV0_RSV0_MASK (0xFFFFu)
#define CSL_CCDC_RSV0_RSV0_SHIFT (0x0000u)
#define CSL_CCDC_RSV0_RSV0_RESETVAL (0x0000u)
#define CSL_CCDC_RSV0_RESETVAL (0x0000u)
/* GAMMAWD */
#define CSL_CCDC_GAMMAWD_MFIL1_MASK (0x0C00u)
#define CSL_CCDC_GAMMAWD_MFIL1_SHIFT (0x000Au)
#define CSL_CCDC_GAMMAWD_MFIL1_RESETVAL (0x0000u)
/*----MFIL1 Tokens----*/
#define CSL_CCDC_GAMMAWD_MFIL1_NOMEDIANFILTER (0x0000u)
#define CSL_CCDC_GAMMAWD_MFIL1_AVERAGEFILTER (0x0001u)
#define CSL_CCDC_GAMMAWD_MFIL1_MEDIANFILTER (0x0002u)
#define CSL_CCDC_GAMMAWD_MFIL1_RESERVED (0x0003u)
#define CSL_CCDC_GAMMAWD_MFIL2_MASK (0x0300u)
#define CSL_CCDC_GAMMAWD_MFIL2_SHIFT (0x0008u)
#define CSL_CCDC_GAMMAWD_MFIL2_RESETVAL (0x0000u)
/*----MFIL2 Tokens----*/
#define CSL_CCDC_GAMMAWD_MFIL2_NOMEDIANFILTER (0x0000u)
#define CSL_CCDC_GAMMAWD_MFIL2_AVERAGEFILTER (0x0001u)
#define CSL_CCDC_GAMMAWD_MFIL2_MEDIANFILTER (0x0002u)
#define CSL_CCDC_GAMMAWD_MFIL2_RESERVED (0x0003u)
#define CSL_CCDC_GAMMAWD_CFAP_MASK (0x0020u)
#define CSL_CCDC_GAMMAWD_CFAP_SHIFT (0x0005u)
#define CSL_CCDC_GAMMAWD_CFAP_RESETVAL (0x0000u)
/*----CFAP Tokens----*/
#define CSL_CCDC_GAMMAWD_CFAP_MOSAIC (0x0000u)
#define CSL_CCDC_GAMMAWD_CFAP_STRIPE (0x0001u)
#define CSL_CCDC_GAMMAWD_GWDI_MASK (0x001Cu)
#define CSL_CCDC_GAMMAWD_GWDI_SHIFT (0x0002u)
#define CSL_CCDC_GAMMAWD_GWDI_RESETVAL (0x0000u)
/*----GWDI Tokens----*/
#define CSL_CCDC_GAMMAWD_GWDI_BITS13_4 (0x0000u)
#define CSL_CCDC_GAMMAWD_GWDI_BITS12_3 (0x0001u)
#define CSL_CCDC_GAMMAWD_GWDI_BITS11_2 (0x0002u)
#define CSL_CCDC_GAMMAWD_GWDI_BITS10_1 (0x0003u)
#define CSL_CCDC_GAMMAWD_GWDI_BITS9_0 (0x0004u)
#define CSL_CCDC_GAMMAWD_CCDTBL_MASK (0x0001u)
#define CSL_CCDC_GAMMAWD_CCDTBL_SHIFT (0x0000u)
#define CSL_CCDC_GAMMAWD_CCDTBL_RESETVAL (0x0000u)
/*----CCDTBL Tokens----*/
#define CSL_CCDC_GAMMAWD_CCDTBL_DISABLE (0x0000u)
#define CSL_CCDC_GAMMAWD_CCDTBL_ENABLE (0x0001u)
#define CSL_CCDC_GAMMAWD_RESETVAL (0x0000u)
/* REC656IF */
#define CSL_CCDC_REC656IF_ECCFVH_MASK (0x0002u)
#define CSL_CCDC_REC656IF_ECCFVH_SHIFT (0x0001u)
#define CSL_CCDC_REC656IF_ECCFVH_RESETVAL (0x0000u)
/*----ECCFVH Tokens----*/
#define CSL_CCDC_REC656IF_ECCFVH_DISABLE (0x0000u)
#define CSL_CCDC_REC656IF_ECCFVH_ENABLE (0x0001u)
#define CSL_CCDC_REC656IF_R656ON_MASK (0x0001u)
#define CSL_CCDC_REC656IF_R656ON_SHIFT (0x0000u)
#define CSL_CCDC_REC656IF_R656ON_RESETVAL (0x0000u)
/*----R656ON Tokens----*/
#define CSL_CCDC_REC656IF_R656ON_DISABLE (0x0000u)
#define CSL_CCDC_REC656IF_R656ON_ENABLE (0x0001u)
#define CSL_CCDC_REC656IF_RESETVAL (0x0000u)
/* CCDCFG */
#define CSL_CCDC_CCDCFG_VDLC_MASK (0x8000u)
#define CSL_CCDC_CCDCFG_VDLC_SHIFT (0x000Fu)
#define CSL_CCDC_CCDCFG_VDLC_RESETVAL (0x0000u)
/*----VDLC Tokens----*/
#define CSL_CCDC_CCDCFG_VDLC_LATCHEDONVSYNC (0x0000u)
#define CSL_CCDC_CCDCFG_VDLC_NOTLATCHEDONVSYNC (0x0001u)
#define CSL_CCDC_CCDCFG_MSBINVI_MASK (0x2000u)
#define CSL_CCDC_CCDCFG_MSBINVI_SHIFT (0x000Du)
#define CSL_CCDC_CCDCFG_MSBINVI_RESETVAL (0x0000u)
/*----MSBINVI Tokens----*/
#define CSL_CCDC_CCDCFG_MSBINVI_NORMAL (0x0000u)
#define CSL_CCDC_CCDCFG_MSBINVI_MSBINVERTED (0x0001u)
#define CSL_CCDC_CCDCFG_BSWD_MASK (0x1000u)
#define CSL_CCDC_CCDCFG_BSWD_SHIFT (0x000Cu)
#define CSL_CCDC_CCDCFG_BSWD_RESETVAL (0x0000u)
/*----BSWD Tokens----*/
#define CSL_CCDC_CCDCFG_BSWD_NORMAL (0x0000u)
#define CSL_CCDC_CCDCFG_BSWD_SWAPBYTES (0x0001u)
#define CSL_CCDC_CCDCFG_Y8POS_MASK (0x0800u)
#define CSL_CCDC_CCDCFG_Y8POS_SHIFT (0x000Bu)
#define CSL_CCDC_CCDCFG_Y8POS_RESETVAL (0x0000u)
/*----Y8POS Tokens----*/
#define CSL_CCDC_CCDCFG_Y8POS_EVENPIXEL (0x0000u)
#define CSL_CCDC_CCDCFG_Y8POS_ODDPIXEL (0x0001u)
#define CSL_CCDC_CCDCFG_EXTRG_MASK (0x0400u)
#define CSL_CCDC_CCDCFG_EXTRG_SHIFT (0x000Au)
#define CSL_CCDC_CCDCFG_EXTRG_RESETVAL (0x0000u)
/*----EXTRG Tokens----*/
#define CSL_CCDC_CCDCFG_EXTRG_DISABLE (0x0000u)
#define CSL_CCDC_CCDCFG_EXTRG_ENABLE (0x0001u)
#define CSL_CCDC_CCDCFG_TRGSEL_MASK (0x0200u)
#define CSL_CCDC_CCDCFG_TRGSEL_SHIFT (0x0009u)
#define CSL_CCDC_CCDCFG_TRGSEL_RESETVAL (0x0000u)
/*----TRGSEL Tokens----*/
#define CSL_CCDC_CCDCFG_TRGSEL_WENBIT (0x0000u)
#define CSL_CCDC_CCDCFG_TRGSEL_FID_INPUT_PORT (0x0001u)
#define CSL_CCDC_CCDCFG_WENLOG_MASK (0x0100u)
#define CSL_CCDC_CCDCFG_WENLOG_SHIFT (0x0008u)
#define CSL_CCDC_CCDCFG_WENLOG_RESETVAL (0x0000u)
/*----WENLOG Tokens----*/
#define CSL_CCDC_CCDCFG_WENLOG_AND (0x0000u)
#define CSL_CCDC_CCDCFG_WENLOG_OR (0x0001u)
#define CSL_CCDC_CCDCFG_FIDMD_MASK (0x0040u)
#define CSL_CCDC_CCDCFG_FIDMD_SHIFT (0x0006u)
#define CSL_CCDC_CCDCFG_FIDMD_RESETVAL (0x0000u)
/*----FIDMD Tokens----*/
#define CSL_CCDC_CCDCFG_FIDMD_LATCH_AT_VSYNC (0x0000u)
#define CSL_CCDC_CCDCFG_FIDMD_NO_LATCH (0x0001u)
#define CSL_CCDC_CCDCFG_BW656_MASK (0x0020u)
#define CSL_CCDC_CCDCFG_BW656_SHIFT (0x0005u)
#define CSL_CCDC_CCDCFG_BW656_RESETVAL (0x0000u)
/*----BW656 Tokens----*/
#define CSL_CCDC_CCDCFG_BW656__8_BITS (0x0000u)
#define CSL_CCDC_CCDCFG_BW656__10_BITS (0x0001u)
#define CSL_CCDC_CCDCFG_YCINSWP_MASK (0x0010u)
#define CSL_CCDC_CCDCFG_YCINSWP_SHIFT (0x0004u)
#define CSL_CCDC_CCDCFG_YCINSWP_RESETVAL (0x0000u)
/*----YCINSWP Tokens----*/
#define CSL_CCDC_CCDCFG_YCINSWP_NO_YCIN_SWAP (0x0000u)
#define CSL_CCDC_CCDCFG_YCINSWP_YCIN_SWAP (0x0001u)
#define CSL_CCDC_CCDCFG_RESETVAL (0x0000u)
/* FMTCFG */
#define CSL_CCDC_FMTCFG_ADDRINC_MASK (0x0700u)
#define CSL_CCDC_FMTCFG_ADDRINC_SHIFT (0x0008u)
#define CSL_CCDC_FMTCFG_ADDRINC_RESETVAL (0x0000u)
#define CSL_CCDC_FMTCFG_LNUM_MASK (0x0030u)
#define CSL_CCDC_FMTCFG_LNUM_SHIFT (0x0004u)
#define CSL_CCDC_FMTCFG_LNUM_RESETVAL (0x0000u)
/*----LNUM Tokens----*/
#define CSL_CCDC_FMTCFG_LNUM_1LINE (0x0000u)
#define CSL_CCDC_FMTCFG_LNUM_2LINES (0x0001u)
#define CSL_CCDC_FMTCFG_LNUM_3LINES (0x0002u)
#define CSL_CCDC_FMTCFG_LNUM_4LINES (0x0003u)
#define CSL_CCDC_FMTCFG_FMTMODE_MASK (0x0006u)
#define CSL_CCDC_FMTCFG_FMTMODE_SHIFT (0x0001u)
#define CSL_CCDC_FMTCFG_FMTMODE_RESETVAL (0x0000u)
/*----FMTMODE Tokens----*/
#define CSL_CCDC_FMTCFG_FMTMODE_SPLIT (0x0000u)
#define CSL_CCDC_FMTCFG_FMTMODE_COMBINE (0x0001u)
#define CSL_CCDC_FMTCFG_FMTMODE_LINEALTERNATINGMODE (0x0002u)
#define CSL_CCDC_FMTCFG_FMTEN_MASK (0x0001u)
#define CSL_CCDC_FMTCFG_FMTEN_SHIFT (0x0000u)
#define CSL_CCDC_FMTCFG_FMTEN_RESETVAL (0x0000u)
/*----FMTEN Tokens----*/
#define CSL_CCDC_FMTCFG_FMTEN_OFF (0x0000u)
#define CSL_CCDC_FMTCFG_FMTEN_ON (0x0001u)
#define CSL_CCDC_FMTCFG_RESETVAL (0x0000u)
/* FMTPLEN */
#define CSL_CCDC_FMTPLEN_PLEN3_MASK (0x7000u)
#define CSL_CCDC_FMTPLEN_PLEN3_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPLEN_PLEN3_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPLEN_PLEN2_MASK (0x0700u)
#define CSL_CCDC_FMTPLEN_PLEN2_SHIFT (0x0008u)
#define CSL_CCDC_FMTPLEN_PLEN2_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPLEN_PLEN1_MASK (0x00F0u)
#define CSL_CCDC_FMTPLEN_PLEN1_SHIFT (0x0004u)
#define CSL_CCDC_FMTPLEN_PLEN1_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPLEN_PLEN0_MASK (0x000Fu)
#define CSL_CCDC_FMTPLEN_PLEN0_SHIFT (0x0000u)
#define CSL_CCDC_FMTPLEN_PLEN0_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPLEN_RESETVAL (0x0000u)
/* FMTSPH */
#define CSL_CCDC_FMTSPH_FMTSPH_MASK (0x1FFFu)
#define CSL_CCDC_FMTSPH_FMTSPH_SHIFT (0x0000u)
#define CSL_CCDC_FMTSPH_FMTSPH_RESETVAL (0x0000u)
#define CSL_CCDC_FMTSPH_RESETVAL (0x0000u)
/* FMTLNH */
#define CSL_CCDC_FMTLNH_FMTLNH_MASK (0x1FFFu)
#define CSL_CCDC_FMTLNH_FMTLNH_SHIFT (0x0000u)
#define CSL_CCDC_FMTLNH_FMTLNH_RESETVAL (0x0000u)
#define CSL_CCDC_FMTLNH_RESETVAL (0x0000u)
/* FMTSLV */
#define CSL_CCDC_FMTSLV_FMTSLV_MASK (0x1FFFu)
#define CSL_CCDC_FMTSLV_FMTSLV_SHIFT (0x0000u)
#define CSL_CCDC_FMTSLV_FMTSLV_RESETVAL (0x0000u)
#define CSL_CCDC_FMTSLV_RESETVAL (0x0000u)
/* FMTLNV */
#define CSL_CCDC_FMTLNV_FMTLNV_MASK (0x7FFFu)
#define CSL_CCDC_FMTLNV_FMTLNV_SHIFT (0x0000u)
#define CSL_CCDC_FMTLNV_FMTLNV_RESETVAL (0x0000u)
#define CSL_CCDC_FMTLNV_RESETVAL (0x0000u)
/* FMTRLEN */
#define CSL_CCDC_FMTRLEN_FMTRLEN_MASK (0x1FFFu)
#define CSL_CCDC_FMTRLEN_FMTRLEN_SHIFT (0x0000u)
#define CSL_CCDC_FMTRLEN_FMTRLEN_RESETVAL (0x0000u)
#define CSL_CCDC_FMTRLEN_RESETVAL (0x0000u)
/* FMTHCNT */
#define CSL_CCDC_FMTHCNT_FMTHCNT_MASK (0x1FFFu)
#define CSL_CCDC_FMTHCNT_FMTHCNT_SHIFT (0x0000u)
#define CSL_CCDC_FMTHCNT_FMTHCNT_RESETVAL (0x0000u)
#define CSL_CCDC_FMTHCNT_RESETVAL (0x0000u)
/* FMT_ADDR_PTR */
#define CSL_CCDC_FMT_ADDR_PTR_LINE_MASK (0x00006000u)
#define CSL_CCDC_FMT_ADDR_PTR_LINE_SHIFT (0x0000000Du)
#define CSL_CCDC_FMT_ADDR_PTR_LINE_RESETVAL (0x00000000u)
/*----LINE Tokens----*/
#define CSL_CCDC_FMT_ADDR_PTR_LINE__1STLINE (0x00000000u)
#define CSL_CCDC_FMT_ADDR_PTR_LINE__2NDLINE (0x00000001u)
#define CSL_CCDC_FMT_ADDR_PTR_LINE__3RDLINE (0x00000002u)
#define CSL_CCDC_FMT_ADDR_PTR_LINE__4THLINE (0x00000003u)
#define CSL_CCDC_FMT_ADDR_PTR_INIT_MASK (0x00001FFFu)
#define CSL_CCDC_FMT_ADDR_PTR_INIT_SHIFT (0x00000000u)
#define CSL_CCDC_FMT_ADDR_PTR_INIT_RESETVAL (0x00000000u)
#define CSL_CCDC_FMT_ADDR_PTR_RESETVAL (0x00000000u)
/* FMTPGM_VF0 */
#define CSL_CCDC_FMTPGM_VF0_PGM15EN_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_VF0_PGM15EN_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_VF0_PGM15EN_RESETVAL (0x0000u)
/*----PGM15EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM15EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM15EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM14EN_MASK (0x4000u)
#define CSL_CCDC_FMTPGM_VF0_PGM14EN_SHIFT (0x000Eu)
#define CSL_CCDC_FMTPGM_VF0_PGM14EN_RESETVAL (0x0000u)
/*----PGM14EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM14EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM14EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM13EN_MASK (0x2000u)
#define CSL_CCDC_FMTPGM_VF0_PGM13EN_SHIFT (0x000Du)
#define CSL_CCDC_FMTPGM_VF0_PGM13EN_RESETVAL (0x0000u)
/*----PGM13EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM13EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM13EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM12EN_MASK (0x1000u)
#define CSL_CCDC_FMTPGM_VF0_PGM12EN_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_VF0_PGM12EN_RESETVAL (0x0000u)
/*----PGM12EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM12EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM12EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM11EN_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_VF0_PGM11EN_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_VF0_PGM11EN_RESETVAL (0x0000u)
/*----PGM11EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM11EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM11EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM10EN_MASK (0x0400u)
#define CSL_CCDC_FMTPGM_VF0_PGM10EN_SHIFT (0x000Au)
#define CSL_CCDC_FMTPGM_VF0_PGM10EN_RESETVAL (0x0000u)
/*----PGM10EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM10EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM10EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM09EN_MASK (0x0200u)
#define CSL_CCDC_FMTPGM_VF0_PGM09EN_SHIFT (0x0009u)
#define CSL_CCDC_FMTPGM_VF0_PGM09EN_RESETVAL (0x0000u)
/*----PGM09EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM09EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM09EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM08EN_MASK (0x0100u)
#define CSL_CCDC_FMTPGM_VF0_PGM08EN_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_VF0_PGM08EN_RESETVAL (0x0000u)
/*----PGM08EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM08EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM08EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM07EN_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_VF0_PGM07EN_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_VF0_PGM07EN_RESETVAL (0x0000u)
/*----PGM07EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM07EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM07EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM06EN_MASK (0x0040u)
#define CSL_CCDC_FMTPGM_VF0_PGM06EN_SHIFT (0x0006u)
#define CSL_CCDC_FMTPGM_VF0_PGM06EN_RESETVAL (0x0000u)
/*----PGM06EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM06EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM06EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM05EN_MASK (0x0020u)
#define CSL_CCDC_FMTPGM_VF0_PGM05EN_SHIFT (0x0005u)
#define CSL_CCDC_FMTPGM_VF0_PGM05EN_RESETVAL (0x0000u)
/*----PGM05EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM05EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM05EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM04EN_MASK (0x0010u)
#define CSL_CCDC_FMTPGM_VF0_PGM04EN_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_VF0_PGM04EN_RESETVAL (0x0000u)
/*----PGM04EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM04EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM04EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM03EN_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_VF0_PGM03EN_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_VF0_PGM03EN_RESETVAL (0x0000u)
/*----PGM03EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM03EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM03EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM02EN_MASK (0x0004u)
#define CSL_CCDC_FMTPGM_VF0_PGM02EN_SHIFT (0x0002u)
#define CSL_CCDC_FMTPGM_VF0_PGM02EN_RESETVAL (0x0000u)
/*----PGM02EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM02EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM02EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM01EN_MASK (0x0002u)
#define CSL_CCDC_FMTPGM_VF0_PGM01EN_SHIFT (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM01EN_RESETVAL (0x0000u)
/*----PGM01EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM01EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM01EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM00EN_MASK (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_PGM00EN_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM00EN_RESETVAL (0x0000u)
/*----PGM00EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF0_PGM00EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF0_PGM00EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF0_RESETVAL (0x0000u)
/* FMTPGM_VF1 */
#define CSL_CCDC_FMTPGM_VF1_PGM31EN_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_VF1_PGM31EN_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_VF1_PGM31EN_RESETVAL (0x0000u)
/*----PGM31EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM31EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM31EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM30EN_MASK (0x4000u)
#define CSL_CCDC_FMTPGM_VF1_PGM30EN_SHIFT (0x000Eu)
#define CSL_CCDC_FMTPGM_VF1_PGM30EN_RESETVAL (0x0000u)
/*----PGM30EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM30EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM30EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM29EN_MASK (0x2000u)
#define CSL_CCDC_FMTPGM_VF1_PGM29EN_SHIFT (0x000Du)
#define CSL_CCDC_FMTPGM_VF1_PGM29EN_RESETVAL (0x0000u)
/*----PGM29EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM29EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM29EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM28EN_MASK (0x1000u)
#define CSL_CCDC_FMTPGM_VF1_PGM28EN_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_VF1_PGM28EN_RESETVAL (0x0000u)
/*----PGM28EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM28EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM28EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM27EN_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_VF1_PGM27EN_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_VF1_PGM27EN_RESETVAL (0x0000u)
/*----PGM27EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM27EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM27EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM26EN_MASK (0x0400u)
#define CSL_CCDC_FMTPGM_VF1_PGM26EN_SHIFT (0x000Au)
#define CSL_CCDC_FMTPGM_VF1_PGM26EN_RESETVAL (0x0000u)
/*----PGM26EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM26EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM26EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM25EN_MASK (0x0200u)
#define CSL_CCDC_FMTPGM_VF1_PGM25EN_SHIFT (0x0009u)
#define CSL_CCDC_FMTPGM_VF1_PGM25EN_RESETVAL (0x0000u)
/*----PGM25EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM25EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM25EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM24EN_MASK (0x0100u)
#define CSL_CCDC_FMTPGM_VF1_PGM24EN_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_VF1_PGM24EN_RESETVAL (0x0000u)
/*----PGM24EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM24EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM24EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM23EN_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_VF1_PGM23EN_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_VF1_PGM23EN_RESETVAL (0x0000u)
/*----PGM23EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM23EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM23EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM22EN_MASK (0x0040u)
#define CSL_CCDC_FMTPGM_VF1_PGM22EN_SHIFT (0x0006u)
#define CSL_CCDC_FMTPGM_VF1_PGM22EN_RESETVAL (0x0000u)
/*----PGM22EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM22EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM22EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM21EN_MASK (0x0020u)
#define CSL_CCDC_FMTPGM_VF1_PGM21EN_SHIFT (0x0005u)
#define CSL_CCDC_FMTPGM_VF1_PGM21EN_RESETVAL (0x0000u)
/*----PGM21EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM21EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM21EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM20EN_MASK (0x0010u)
#define CSL_CCDC_FMTPGM_VF1_PGM20EN_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_VF1_PGM20EN_RESETVAL (0x0000u)
/*----PGM20EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM20EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM20EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM19EN_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_VF1_PGM19EN_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_VF1_PGM19EN_RESETVAL (0x0000u)
/*----PGM19EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM19EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM19EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM18EN_MASK (0x0004u)
#define CSL_CCDC_FMTPGM_VF1_PGM18EN_SHIFT (0x0002u)
#define CSL_CCDC_FMTPGM_VF1_PGM18EN_RESETVAL (0x0000u)
/*----PGM18EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM18EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM18EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM17EN_MASK (0x0002u)
#define CSL_CCDC_FMTPGM_VF1_PGM17EN_SHIFT (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM17EN_RESETVAL (0x0000u)
/*----PGM17EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM17EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM17EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM16EN_MASK (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_PGM16EN_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM16EN_RESETVAL (0x0000u)
/*----PGM16EN Tokens----*/
#define CSL_CCDC_FMTPGM_VF1_PGM16EN_SKIP_PIXEL (0x0000u)
#define CSL_CCDC_FMTPGM_VF1_PGM16EN_VALID_PIXEL (0x0001u)
#define CSL_CCDC_FMTPGM_VF1_RESETVAL (0x0000u)
/* FMTPGM_AP0 */
#define CSL_CCDC_FMTPGM_AP0_PGM03UPDT_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_AP0_PGM03UPDT_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_AP0_PGM03UPDT_RESETVAL (0x0000u)
/*----PGM03UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP0_PGM03UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_PGM03UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP0_PGM03APTR_MASK (0x7000u)
#define CSL_CCDC_FMTPGM_AP0_PGM03APTR_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_AP0_PGM03APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_PGM02UPDT_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_AP0_PGM02UPDT_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_AP0_PGM02UPDT_RESETVAL (0x0000u)
/*----PGM02UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP0_PGM02UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_PGM02UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP0_PGM02APTR_MASK (0x0700u)
#define CSL_CCDC_FMTPGM_AP0_PGM02APTR_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_AP0_PGM02APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_PGM01UPDT_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_AP0_PGM01UPDT_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_AP0_PGM01UPDT_RESETVAL (0x0000u)
/*----PGM01UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP0_PGM01UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_PGM01UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP0_PGM01APTR_MASK (0x0070u)
#define CSL_CCDC_FMTPGM_AP0_PGM01APTR_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_AP0_PGM01APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_PGM00UPDT_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_AP0_PGM00UPDT_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_AP0_PGM00UPDT_RESETVAL (0x0000u)
/*----PGM00UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP0_PGM00UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_PGM00UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP0_PGM00APTR_MASK (0x0007u)
#define CSL_CCDC_FMTPGM_AP0_PGM00APTR_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_PGM00APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP0_RESETVAL (0x0000u)
/* FMTPGM_AP1 */
#define CSL_CCDC_FMTPGM_AP1_PGM07UPDT_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_AP1_PGM07UPDT_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_AP1_PGM07UPDT_RESETVAL (0x0000u)
/*----PGM07UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP1_PGM07UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_PGM07UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP1_PGM07APTR_MASK (0x7000u)
#define CSL_CCDC_FMTPGM_AP1_PGM07APTR_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_AP1_PGM07APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_PGM06UPDT_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_AP1_PGM06UPDT_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_AP1_PGM06UPDT_RESETVAL (0x0000u)
/*----PGM06UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP1_PGM06UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_PGM06UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP1_PGM06APTR_MASK (0x0700u)
#define CSL_CCDC_FMTPGM_AP1_PGM06APTR_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_AP1_PGM06APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_PGM05UPDT_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_AP1_PGM05UPDT_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_AP1_PGM05UPDT_RESETVAL (0x0000u)
/*----PGM05UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP1_PGM05UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_PGM05UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP1_PGM05APTR_MASK (0x0070u)
#define CSL_CCDC_FMTPGM_AP1_PGM05APTR_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_AP1_PGM05APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_PGM04UPDT_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_AP1_PGM04UPDT_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_AP1_PGM04UPDT_RESETVAL (0x0000u)
/*----PGM04UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP1_PGM04UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_PGM04UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP1_PGM04APTR_MASK (0x0007u)
#define CSL_CCDC_FMTPGM_AP1_PGM04APTR_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_PGM04APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP1_RESETVAL (0x0000u)
/* FMTPGM_AP2 */
#define CSL_CCDC_FMTPGM_AP2_PGM11UPDT_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_AP2_PGM11UPDT_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_AP2_PGM11UPDT_RESETVAL (0x0000u)
/*----PGM11UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP2_PGM11UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_PGM11UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP2_PGM11APTR_MASK (0x7000u)
#define CSL_CCDC_FMTPGM_AP2_PGM11APTR_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_AP2_PGM11APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_PGM10UPDT_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_AP2_PGM10UPDT_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_AP2_PGM10UPDT_RESETVAL (0x0000u)
/*----PGM10UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP2_PGM10UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_PGM10UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP2_PGM10APTR_MASK (0x0700u)
#define CSL_CCDC_FMTPGM_AP2_PGM10APTR_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_AP2_PGM10APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_PGM09UPDT_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_AP2_PGM09UPDT_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_AP2_PGM09UPDT_RESETVAL (0x0000u)
/*----PGM09UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP2_PGM09UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_PGM09UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP2_PGM09APTR_MASK (0x0070u)
#define CSL_CCDC_FMTPGM_AP2_PGM09APTR_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_AP2_PGM09APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_PGM08UPDT_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_AP2_PGM08UPDT_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_AP2_PGM08UPDT_RESETVAL (0x0000u)
/*----PGM08UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP2_PGM08UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_PGM08UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP2_PGM08APTR_MASK (0x0007u)
#define CSL_CCDC_FMTPGM_AP2_PGM08APTR_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_PGM08APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP2_RESETVAL (0x0000u)
/* FMTPGM_AP3 */
#define CSL_CCDC_FMTPGM_AP3_PGM15UPDT_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_AP3_PGM15UPDT_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_AP3_PGM15UPDT_RESETVAL (0x0000u)
/*----PGM15UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP3_PGM15UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_PGM15UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP3_PGM15APTR_MASK (0x7000u)
#define CSL_CCDC_FMTPGM_AP3_PGM15APTR_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_AP3_PGM15APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_PGM14UPDT_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_AP3_PGM14UPDT_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_AP3_PGM14UPDT_RESETVAL (0x0000u)
/*----PGM14UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP3_PGM14UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_PGM14UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP3_PGM14APTR_MASK (0x0700u)
#define CSL_CCDC_FMTPGM_AP3_PGM14APTR_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_AP3_PGM14APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_PGM13UPDT_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_AP3_PGM13UPDT_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_AP3_PGM13UPDT_RESETVAL (0x0000u)
/*----PGM13UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP3_PGM13UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_PGM13UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP3_PGM13APTR_MASK (0x0070u)
#define CSL_CCDC_FMTPGM_AP3_PGM13APTR_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_AP3_PGM13APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_PGM12UPDT_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_AP3_PGM12UPDT_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_AP3_PGM12UPDT_RESETVAL (0x0000u)
/*----PGM12UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP3_PGM12UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_PGM12UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP3_PGM12APTR_MASK (0x0007u)
#define CSL_CCDC_FMTPGM_AP3_PGM12APTR_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_PGM12APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP3_RESETVAL (0x0000u)
/* FMTPGM_AP4 */
#define CSL_CCDC_FMTPGM_AP4_PGM19UPDT_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_AP4_PGM19UPDT_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_AP4_PGM19UPDT_RESETVAL (0x0000u)
/*----PGM19UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP4_PGM19UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_PGM19UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP4_PGM19APTR_MASK (0x7000u)
#define CSL_CCDC_FMTPGM_AP4_PGM19APTR_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_AP4_PGM19APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_PGM18UPDT_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_AP4_PGM18UPDT_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_AP4_PGM18UPDT_RESETVAL (0x0000u)
/*----PGM18UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP4_PGM18UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_PGM18UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP4_PGM18APTR_MASK (0x0700u)
#define CSL_CCDC_FMTPGM_AP4_PGM18APTR_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_AP4_PGM18APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_PGM17UPDT_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_AP4_PGM17UPDT_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_AP4_PGM17UPDT_RESETVAL (0x0000u)
/*----PGM17UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP4_PGM17UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_PGM17UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP4_PGM17APTR_MASK (0x0070u)
#define CSL_CCDC_FMTPGM_AP4_PGM17APTR_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_AP4_PGM17APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_PGM16UPDT_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_AP4_PGM16UPDT_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_AP4_PGM16UPDT_RESETVAL (0x0000u)
/*----PGM16UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP4_PGM16UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_PGM16UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP4_PGM16APTR_MASK (0x0007u)
#define CSL_CCDC_FMTPGM_AP4_PGM16APTR_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_PGM16APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP4_RESETVAL (0x0000u)
/* FMTPGM_AP5 */
#define CSL_CCDC_FMTPGM_AP5_PGM23UPDT_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_AP5_PGM23UPDT_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_AP5_PGM23UPDT_RESETVAL (0x0000u)
/*----PGM23UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP5_PGM23UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_PGM23UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP5_PGM23APTR_MASK (0x7000u)
#define CSL_CCDC_FMTPGM_AP5_PGM23APTR_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_AP5_PGM23APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_PGM22UPDT_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_AP5_PGM22UPDT_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_AP5_PGM22UPDT_RESETVAL (0x0000u)
/*----PGM22UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP5_PGM22UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_PGM22UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP5_PGM22APTR_MASK (0x0700u)
#define CSL_CCDC_FMTPGM_AP5_PGM22APTR_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_AP5_PGM22APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_PGM21UPDT_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_AP5_PGM21UPDT_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_AP5_PGM21UPDT_RESETVAL (0x0000u)
/*----PGM21UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP5_PGM21UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_PGM21UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP5_PGM21APTR_MASK (0x0070u)
#define CSL_CCDC_FMTPGM_AP5_PGM21APTR_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_AP5_PGM21APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_PGM20UPDT_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_AP5_PGM20UPDT_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_AP5_PGM20UPDT_RESETVAL (0x0000u)
/*----PGM20UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP5_PGM20UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_PGM20UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP5_PGM20APTR_MASK (0x0007u)
#define CSL_CCDC_FMTPGM_AP5_PGM20APTR_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_PGM20APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP5_RESETVAL (0x0000u)
/* FMTPGM_AP6 */
#define CSL_CCDC_FMTPGM_AP6_PGM27UPDT_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_AP6_PGM27UPDT_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_AP6_PGM27UPDT_RESETVAL (0x0000u)
/*----PGM27UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP6_PGM27UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_PGM27UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP6_PGM27APTR_MASK (0x7000u)
#define CSL_CCDC_FMTPGM_AP6_PGM27APTR_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_AP6_PGM27APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_PGM26UPDT_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_AP6_PGM26UPDT_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_AP6_PGM26UPDT_RESETVAL (0x0000u)
/*----PGM26UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP6_PGM26UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_PGM26UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP6_PGM26APTR_MASK (0x0700u)
#define CSL_CCDC_FMTPGM_AP6_PGM26APTR_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_AP6_PGM26APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_PGM25UPDT_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_AP6_PGM25UPDT_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_AP6_PGM25UPDT_RESETVAL (0x0000u)
/*----PGM25UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP6_PGM25UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_PGM25UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP6_PGM25APTR_MASK (0x0070u)
#define CSL_CCDC_FMTPGM_AP6_PGM25APTR_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_AP6_PGM25APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_PGM24UPDT_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_AP6_PGM24UPDT_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_AP6_PGM24UPDT_RESETVAL (0x0000u)
/*----PGM24UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP6_PGM24UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_PGM24UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP6_PGM24APTR_MASK (0x0007u)
#define CSL_CCDC_FMTPGM_AP6_PGM24APTR_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_PGM24APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP6_RESETVAL (0x0000u)
/* FMTPGM_AP7 */
#define CSL_CCDC_FMTPGM_AP7_PGM31UPDT_MASK (0x8000u)
#define CSL_CCDC_FMTPGM_AP7_PGM31UPDT_SHIFT (0x000Fu)
#define CSL_CCDC_FMTPGM_AP7_PGM31UPDT_RESETVAL (0x0000u)
/*----PGM31UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP7_PGM31UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_PGM31UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP7_PGM31APTR_MASK (0x7000u)
#define CSL_CCDC_FMTPGM_AP7_PGM31APTR_SHIFT (0x000Cu)
#define CSL_CCDC_FMTPGM_AP7_PGM31APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_PGM30UPDT_MASK (0x0800u)
#define CSL_CCDC_FMTPGM_AP7_PGM30UPDT_SHIFT (0x000Bu)
#define CSL_CCDC_FMTPGM_AP7_PGM30UPDT_RESETVAL (0x0000u)
/*----PGM30UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP7_PGM30UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_PGM30UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP7_PGM30APTR_MASK (0x0700u)
#define CSL_CCDC_FMTPGM_AP7_PGM30APTR_SHIFT (0x0008u)
#define CSL_CCDC_FMTPGM_AP7_PGM30APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_PGM29UPDT_MASK (0x0080u)
#define CSL_CCDC_FMTPGM_AP7_PGM29UPDT_SHIFT (0x0007u)
#define CSL_CCDC_FMTPGM_AP7_PGM29UPDT_RESETVAL (0x0000u)
/*----PGM29UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP7_PGM29UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_PGM29UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP7_PGM29APTR_MASK (0x0070u)
#define CSL_CCDC_FMTPGM_AP7_PGM29APTR_SHIFT (0x0004u)
#define CSL_CCDC_FMTPGM_AP7_PGM29APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_PGM28UPDT_MASK (0x0008u)
#define CSL_CCDC_FMTPGM_AP7_PGM28UPDT_SHIFT (0x0003u)
#define CSL_CCDC_FMTPGM_AP7_PGM28UPDT_RESETVAL (0x0000u)
/*----PGM28UPDT Tokens----*/
#define CSL_CCDC_FMTPGM_AP7_PGM28UPDT_INCR (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_PGM28UPDT_DECR (0x0001u)
#define CSL_CCDC_FMTPGM_AP7_PGM28APTR_MASK (0x0007u)
#define CSL_CCDC_FMTPGM_AP7_PGM28APTR_SHIFT (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_PGM28APTR_RESETVAL (0x0000u)
#define CSL_CCDC_FMTPGM_AP7_RESETVAL (0x0000u)
/* LSCCFG1 */
#define CSL_CCDC_LSCCFG1_GFMODE_MASK (0x0030u)
#define CSL_CCDC_LSCCFG1_GFMODE_SHIFT (0x0004u)
#define CSL_CCDC_LSCCFG1_GFMODE_RESETVAL (0x0000u)
/*----GFMODE Tokens----*/
#define CSL_CCDC_LSCCFG1_GFMODE_U8Q8_INTERPOLATION (0x0000u)
#define CSL_CCDC_LSCCFG1_GFMODE_U16Q14_INTERPOLATION (0x0001u)
#define CSL_CCDC_LSCCFG1_GFMODE_RESERVED (0x0002u)
#define CSL_CCDC_LSCCFG1_GFMODE_U16Q14 (0x0003u)
#define CSL_CCDC_LSCCFG1_LSCEN_MASK (0x0001u)
#define CSL_CCDC_LSCCFG1_LSCEN_SHIFT (0x0000u)
#define CSL_CCDC_LSCCFG1_LSCEN_RESETVAL (0x0000u)
/*----LSCEN Tokens----*/
#define CSL_CCDC_LSCCFG1_LSCEN_DISABLE (0x0000u)
#define CSL_CCDC_LSCCFG1_LSCEN_ENABLE (0x0001u)
#define CSL_CCDC_LSCCFG1_RESETVAL (0x0000u)
/* LSCCFG2 */
#define CSL_CCDC_LSCCFG2_GFTSEL_OPOL_MASK (0xC000u)
#define CSL_CCDC_LSCCFG2_GFTSEL_OPOL_SHIFT (0x000Eu)
#define CSL_CCDC_LSCCFG2_GFTSEL_OPOL_RESETVAL (0x0000u)
/*----GFTSEL_OPOL Tokens----*/
#define CSL_CCDC_LSCCFG2_GFTSEL_OPOL_TABLE1 (0x0000u)
#define CSL_CCDC_LSCCFG2_GFTSEL_OPOL_TABLE2 (0x0001u)
#define CSL_CCDC_LSCCFG2_GFTSEL_OPOL_TABLE3 (0x0002u)
#define CSL_CCDC_LSCCFG2_GFTSEL_EPOL_MASK (0x3000u)
#define CSL_CCDC_LSCCFG2_GFTSEL_EPOL_SHIFT (0x000Cu)
#define CSL_CCDC_LSCCFG2_GFTSEL_EPOL_RESETVAL (0x0000u)
#define CSL_CCDC_LSCCFG2_GFTSEL_OPEL_MASK (0x0C00u)
#define CSL_CCDC_LSCCFG2_GFTSEL_OPEL_SHIFT (0x000Au)
#define CSL_CCDC_LSCCFG2_GFTSEL_OPEL_RESETVAL (0x0000u)
#define CSL_CCDC_LSCCFG2_GFTSEL_EPEL_MASK (0x0300u)
#define CSL_CCDC_LSCCFG2_GFTSEL_EPEL_SHIFT (0x0008u)
#define CSL_CCDC_LSCCFG2_GFTSEL_EPEL_RESETVAL (0x0000u)
#define CSL_CCDC_LSCCFG2_GFTINV_MASK (0x00F0u)
#define CSL_CCDC_LSCCFG2_GFTINV_SHIFT (0x0004u)
#define CSL_CCDC_LSCCFG2_GFTINV_RESETVAL (0x0000u)
#define CSL_CCDC_LSCCFG2_GFTSF_MASK (0x000Eu)
#define CSL_CCDC_LSCCFG2_GFTSF_SHIFT (0x0001u)
#define CSL_CCDC_LSCCFG2_GFTSF_RESETVAL (0x0007u)
#define CSL_CCDC_LSCCFG2_RESETVAL (0x000Eu)
/* LSCH0 */
#define CSL_CCDC_LSCH0_LSCCSW_MASK (0xC000u)
#define CSL_CCDC_LSCH0_LSCCSW_SHIFT (0x000Eu)
#define CSL_CCDC_LSCH0_LSCCSW_RESETVAL (0x0000u)
/*----LSCCSW Tokens----*/
#define CSL_CCDC_LSCH0_LSCCSW_TABLE1 (0x0000u)
#define CSL_CCDC_LSCH0_LSCCSW_TABLE2 (0x0001u)
#define CSL_CCDC_LSCH0_LSCCSW_TABLE3 (0x0002u)
#define CSL_CCDC_LSCH0_LSCH0_MASK (0x3FFFu)
#define CSL_CCDC_LSCH0_LSCH0_SHIFT (0x0000u)
#define CSL_CCDC_LSCH0_LSCH0_RESETVAL (0x0000u)
#define CSL_CCDC_LSCH0_RESETVAL (0x0000u)
/* LSCV0 */
#define CSL_CCDC_LSCV0_LSCV0_MASK (0x3FFFu)
#define CSL_CCDC_LSCV0_LSCV0_SHIFT (0x0000u)
#define CSL_CCDC_LSCV0_LSCV0_RESETVAL (0x0000u)
#define CSL_CCDC_LSCV0_RESETVAL (0x0000u)
/* LSCKH */
#define CSL_CCDC_LSCKH_KHR_MASK (0xFF00u)
#define CSL_CCDC_LSCKH_KHR_SHIFT (0x0008u)
#define CSL_CCDC_LSCKH_KHR_RESETVAL (0x0000u)
#define CSL_CCDC_LSCKH_KHL_MASK (0x00FFu)
#define CSL_CCDC_LSCKH_KHL_SHIFT (0x0000u)
#define CSL_CCDC_LSCKH_KHL_RESETVAL (0x0000u)
#define CSL_CCDC_LSCKH_RESETVAL (0x0000u)
/* LSCKV */
#define CSL_CCDC_LSCKV_KVL_MASK (0xFF00u)
#define CSL_CCDC_LSCKV_KVL_SHIFT (0x0008u)
#define CSL_CCDC_LSCKV_KVL_RESETVAL (0x0000u)
#define CSL_CCDC_LSCKV_KVU_MASK (0x00FFu)
#define CSL_CCDC_LSCKV_KVU_SHIFT (0x0000u)
#define CSL_CCDC_LSCKV_KVU_RESETVAL (0x0000u)
#define CSL_CCDC_LSCKV_RESETVAL (0x0000u)
/* LSCMEMCTL */
#define CSL_CCDC_LSCMEMCTL_LSCMBSY_MASK (0x0010u)
#define CSL_CCDC_LSCMEMCTL_LSCMBSY_SHIFT (0x0004u)
#define CSL_CCDC_LSCMEMCTL_LSCMBSY_RESETVAL (0x0000u)
/*----LSCMBSY Tokens----*/
#define CSL_CCDC_LSCMEMCTL_LSCMBSY_NOTBUSY (0x0000u)
#define CSL_CCDC_LSCMEMCTL_LSCMBSY_BUSY (0x0001u)
#define CSL_CCDC_LSCMEMCTL_LSCMRD_MASK (0x0008u)
#define CSL_CCDC_LSCMEMCTL_LSCMRD_SHIFT (0x0003u)
#define CSL_CCDC_LSCMEMCTL_LSCMRD_RESETVAL (0x0000u)
/*----LSCMRD Tokens----*/
#define CSL_CCDC_LSCMEMCTL_LSCMRD_WRITE (0x0000u)
#define CSL_CCDC_LSCMEMCTL_LSCMRD_READ (0x0001u)
#define CSL_CCDC_LSCMEMCTL_LSCMARST_MASK (0x0004u)
#define CSL_CCDC_LSCMEMCTL_LSCMARST_SHIFT (0x0002u)
#define CSL_CCDC_LSCMEMCTL_LSCMARST_RESETVAL (0x0000u)
/*----LSCMARST Tokens----*/
#define CSL_CCDC_LSCMEMCTL_LSCMARST_INCR_ADDR (0x0000u)
#define CSL_CCDC_LSCMEMCTL_LSCMARST_CLR_ADDR (0x0001u)
#define CSL_CCDC_LSCMEMCTL_LSCMSL_MASK (0x0003u)
#define CSL_CCDC_LSCMEMCTL_LSCMSL_SHIFT (0x0000u)
#define CSL_CCDC_LSCMEMCTL_LSCMSL_RESETVAL (0x0000u)
/*----LSCMSL Tokens----*/
#define CSL_CCDC_LSCMEMCTL_LSCMSL_TABLE1 (0x0000u)
#define CSL_CCDC_LSCMEMCTL_LSCMSL_TABLE2 (0x0001u)
#define CSL_CCDC_LSCMEMCTL_LSCMSL_TABLE3 (0x0002u)
#define CSL_CCDC_LSCMEMCTL_LSCMSL_RESERVED (0x0003u)
#define CSL_CCDC_LSCMEMCTL_RESETVAL (0x0000u)
/* LSCMEMD */
#define CSL_CCDC_LSCMEMD_LSCMD_MASK (0xFFFFu)
#define CSL_CCDC_LSCMEMD_LSCMD_SHIFT (0x0000u)
#define CSL_CCDC_LSCMEMD_LSCMD_RESETVAL (0x0000u)
#define CSL_CCDC_LSCMEMD_RESETVAL (0x0000u)
/* LSCMEMQ */
#define CSL_CCDC_LSCMEMQ_LSCMQ_MASK (0xFFFFu)
#define CSL_CCDC_LSCMEMQ_LSCMQ_SHIFT (0x0000u)
#define CSL_CCDC_LSCMEMQ_LSCMQ_RESETVAL (0x0000u)
#define CSL_CCDC_LSCMEMQ_RESETVAL (0x0000u)
/* DFCCTL */
#define CSL_CCDC_DFCCTL_VDFLSFT_MASK (0x0700u)
#define CSL_CCDC_DFCCTL_VDFLSFT_SHIFT (0x0008u)
#define CSL_CCDC_DFCCTL_VDFLSFT_RESETVAL (0x0000u)
#define CSL_CCDC_DFCCTL_VDFCUDA_MASK (0x0080u)
#define CSL_CCDC_DFCCTL_VDFCUDA_SHIFT (0x0007u)
#define CSL_CCDC_DFCCTL_VDFCUDA_RESETVAL (0x0000u)
/*----VDFCUDA Tokens----*/
#define CSL_CCDC_DFCCTL_VDFCUDA_WHOLELINECORRECT (0x0000u)
#define CSL_CCDC_DFCCTL_VDFCUDA_UPPERDISABLE (0x0001u)
#define CSL_CCDC_DFCCTL_VDFCSL_MASK (0x0060u)
#define CSL_CCDC_DFCCTL_VDFCSL_SHIFT (0x0005u)
#define CSL_CCDC_DFCCTL_VDFCSL_RESETVAL (0x0000u)
/*----VDFCSL Tokens----*/
#define CSL_CCDC_DFCCTL_VDFCSL_NORMAL (0x0000u)
#define CSL_CCDC_DFCCTL_VDFCSL_HORZINTERPOLIFSAT (0x0001u)
#define CSL_CCDC_DFCCTL_VDFCSL_HORZINTERPOL (0x0002u)
#define CSL_CCDC_DFCCTL_VDFCSL_RESERVED (0x0003u)
#define CSL_CCDC_DFCCTL_VDFCEN_MASK (0x0010u)
#define CSL_CCDC_DFCCTL_VDFCEN_SHIFT (0x0004u)
#define CSL_CCDC_DFCCTL_VDFCEN_RESETVAL (0x0000u)
/*----VDFCEN Tokens----*/
#define CSL_CCDC_DFCCTL_VDFCEN_OFF (0x0000u)
#define CSL_CCDC_DFCCTL_VDFCEN_ON (0x0001u)
#define CSL_CCDC_DFCCTL_GDFCEN_MASK (0x0001u)
#define CSL_CCDC_DFCCTL_GDFCEN_SHIFT (0x0000u)
#define CSL_CCDC_DFCCTL_GDFCEN_RESETVAL (0x0000u)
/*----GDFCEN Tokens----*/
#define CSL_CCDC_DFCCTL_GDFCEN_OFF (0x0000u)
#define CSL_CCDC_DFCCTL_GDFCEN_ON (0x0001u)
#define CSL_CCDC_DFCCTL_RESETVAL (0x0000u)
/* DFCVSAT */
#define CSL_CCDC_DFCVSAT_VDFSLV_MASK (0x3FFFu)
#define CSL_CCDC_DFCVSAT_VDFSLV_SHIFT (0x0000u)
#define CSL_CCDC_DFCVSAT_VDFSLV_RESETVAL (0x0000u)
#define CSL_CCDC_DFCVSAT_RESETVAL (0x0000u)
/* DFCMEMCTL */
#define CSL_CCDC_DFCMEMCTL_DFCMCLR_MASK (0x0010u)
#define CSL_CCDC_DFCMEMCTL_DFCMCLR_SHIFT (0x0004u)
#define CSL_CCDC_DFCMEMCTL_DFCMCLR_RESETVAL (0x0000u)
/*----DFCMCLR Tokens----*/
#define CSL_CCDC_DFCMEMCTL_DFCMCLR_CLEARCOMPLETE (0x0000u)
#define CSL_CCDC_DFCMEMCTL_DFCMCLR_CLEAR (0x0001u)
#define CSL_CCDC_DFCMEMCTL_DFCMARST_MASK (0x0004u)
#define CSL_CCDC_DFCMEMCTL_DFCMARST_SHIFT (0x0002u)
#define CSL_CCDC_DFCMEMCTL_DFCMARST_RESETVAL (0x0000u)
/*----DFCMARST Tokens----*/
#define CSL_CCDC_DFCMEMCTL_DFCMARST_INCR_ADDR (0x0000u)
#define CSL_CCDC_DFCMEMCTL_DFCMARST_CLR_ADDR (0x0001u)
#define CSL_CCDC_DFCMEMCTL_DFCMRD_MASK (0x0002u)
#define CSL_CCDC_DFCMEMCTL_DFCMRD_SHIFT (0x0001u)
#define CSL_CCDC_DFCMEMCTL_DFCMRD_RESETVAL (0x0000u)
/*----DFCMRD Tokens----*/
#define CSL_CCDC_DFCMEMCTL_DFCMRD_READCOMPLETE (0x0000u)
#define CSL_CCDC_DFCMEMCTL_DFCMRD_READ (0x0001u)
#define CSL_CCDC_DFCMEMCTL_DFCMWR_MASK (0x0001u)
#define CSL_CCDC_DFCMEMCTL_DFCMWR_SHIFT (0x0000u)
#define CSL_CCDC_DFCMEMCTL_DFCMWR_RESETVAL (0x0000u)
/*----DFCMWR Tokens----*/
#define CSL_CCDC_DFCMEMCTL_DFCMWR_WRITECOMPLETE (0x0000u)
#define CSL_CCDC_DFCMEMCTL_DFCMWR_WRITE (0x0001u)
#define CSL_CCDC_DFCMEMCTL_RESETVAL (0x0000u)
/* DFCMEM0 */
#define CSL_CCDC_DFCMEM0_DFCMEM0_MASK (0x0FFFu)
#define CSL_CCDC_DFCMEM0_DFCMEM0_SHIFT (0x0000u)
#define CSL_CCDC_DFCMEM0_DFCMEM0_RESETVAL (0x0000u)
#define CSL_CCDC_DFCMEM0_RESETVAL (0x0000u)
/* DFCMEM1 */
#define CSL_CCDC_DFCMEM1_DFCMEM1_MASK (0x1FFFu)
#define CSL_CCDC_DFCMEM1_DFCMEM1_SHIFT (0x0000u)
#define CSL_CCDC_DFCMEM1_DFCMEM1_RESETVAL (0x0000u)
#define CSL_CCDC_DFCMEM1_RESETVAL (0x0000u)
/* DFCMEM2 */
#define CSL_CCDC_DFCMEM2_DFCMEM2_MASK (0x00FFu)
#define CSL_CCDC_DFCMEM2_DFCMEM2_SHIFT (0x0000u)
#define CSL_CCDC_DFCMEM2_DFCMEM2_RESETVAL (0x0000u)
#define CSL_CCDC_DFCMEM2_RESETVAL (0x0000u)
/* DFCMEM3 */
#define CSL_CCDC_DFCMEM3_DFCMEM3_MASK (0x00FFu)
#define CSL_CCDC_DFCMEM3_DFCMEM3_SHIFT (0x0000u)
#define CSL_CCDC_DFCMEM3_DFCMEM3_RESETVAL (0x0000u)
#define CSL_CCDC_DFCMEM3_RESETVAL (0x0000u)
/* DFCMEM4 */
#define CSL_CCDC_DFCMEM4_DFCMEM4_MASK (0x00FFu)
#define CSL_CCDC_DFCMEM4_DFCMEM4_SHIFT (0x0000u)
#define CSL_CCDC_DFCMEM4_DFCMEM4_RESETVAL (0x0000u)
#define CSL_CCDC_DFCMEM4_RESETVAL (0x0000u)
/* CSCCTL */
#define CSL_CCDC_CSCCTL_CSCEN_MASK (0x0001u)
#define CSL_CCDC_CSCCTL_CSCEN_SHIFT (0x0000u)
#define CSL_CCDC_CSCCTL_CSCEN_RESETVAL (0x0000u)
/*----CSCEN Tokens----*/
#define CSL_CCDC_CSCCTL_CSCEN_DISABLE (0x0000u)
#define CSL_CCDC_CSCCTL_CSCEN_ENABLE (0x0001u)
#define CSL_CCDC_CSCCTL_RESETVAL (0x0000u)
/* CSCM0 */
#define CSL_CCDC_CSCM0_CSCM01_MASK (0xFF00u)
#define CSL_CCDC_CSCM0_CSCM01_SHIFT (0x0008u)
#define CSL_CCDC_CSCM0_CSCM01_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM0_CSCM00_MASK (0x00FFu)
#define CSL_CCDC_CSCM0_CSCM00_SHIFT (0x0000u)
#define CSL_CCDC_CSCM0_CSCM00_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM0_RESETVAL (0x0000u)
/* CSCM1 */
#define CSL_CCDC_CSCM1_CSCM03_MASK (0xFF00u)
#define CSL_CCDC_CSCM1_CSCM03_SHIFT (0x0008u)
#define CSL_CCDC_CSCM1_CSCM03_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM1_CSCM02_MASK (0x00FFu)
#define CSL_CCDC_CSCM1_CSCM02_SHIFT (0x0000u)
#define CSL_CCDC_CSCM1_CSCM02_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM1_RESETVAL (0x0000u)
/* CSCM2 */
#define CSL_CCDC_CSCM2_CSCM11_MASK (0xFF00u)
#define CSL_CCDC_CSCM2_CSCM11_SHIFT (0x0008u)
#define CSL_CCDC_CSCM2_CSCM11_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM2_CSCM10_MASK (0x00FFu)
#define CSL_CCDC_CSCM2_CSCM10_SHIFT (0x0000u)
#define CSL_CCDC_CSCM2_CSCM10_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM2_RESETVAL (0x0000u)
/* CSCM3 */
#define CSL_CCDC_CSCM3_CSCM13_MASK (0xFF00u)
#define CSL_CCDC_CSCM3_CSCM13_SHIFT (0x0008u)
#define CSL_CCDC_CSCM3_CSCM13_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM3_CSCM12_MASK (0x00FFu)
#define CSL_CCDC_CSCM3_CSCM12_SHIFT (0x0000u)
#define CSL_CCDC_CSCM3_CSCM12_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM3_RESETVAL (0x0000u)
/* CSCM4 */
#define CSL_CCDC_CSCM4_CSCM21_MASK (0xFF00u)
#define CSL_CCDC_CSCM4_CSCM21_SHIFT (0x0008u)
#define CSL_CCDC_CSCM4_CSCM21_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM4_CSCM20_MASK (0x00FFu)
#define CSL_CCDC_CSCM4_CSCM20_SHIFT (0x0000u)
#define CSL_CCDC_CSCM4_CSCM20_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM4_RESETVAL (0x0000u)
/* CSCM5 */
#define CSL_CCDC_CSCM5_CSCM23_MASK (0xFF00u)
#define CSL_CCDC_CSCM5_CSCM23_SHIFT (0x0008u)
#define CSL_CCDC_CSCM5_CSCM23_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM5_CSCM22_MASK (0x00FFu)
#define CSL_CCDC_CSCM5_CSCM22_SHIFT (0x0000u)
#define CSL_CCDC_CSCM5_CSCM22_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM5_RESETVAL (0x0000u)
/* CSCM6 */
#define CSL_CCDC_CSCM6_CSCM31_MASK (0xFF00u)
#define CSL_CCDC_CSCM6_CSCM31_SHIFT (0x0008u)
#define CSL_CCDC_CSCM6_CSCM31_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM6_CSCM30_MASK (0x00FFu)
#define CSL_CCDC_CSCM6_CSCM30_SHIFT (0x0000u)
#define CSL_CCDC_CSCM6_CSCM30_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM6_RESETVAL (0x0000u)
/* CSCM7 */
#define CSL_CCDC_CSCM7_CSCM33_MASK (0xFF00u)
#define CSL_CCDC_CSCM7_CSCM33_SHIFT (0x0008u)
#define CSL_CCDC_CSCM7_CSCM33_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM7_CSCM32_MASK (0x00FFu)
#define CSL_CCDC_CSCM7_CSCM32_SHIFT (0x0000u)
#define CSL_CCDC_CSCM7_CSCM32_RESETVAL (0x0000u)
#define CSL_CCDC_CSCM7_RESETVAL (0x0000u)
/* DATAOFST */
#define CSL_CCDC_DATAOFST_VOFST_MASK (0xFF00u)
#define CSL_CCDC_DATAOFST_VOFST_SHIFT (0x0008u)
#define CSL_CCDC_DATAOFST_VOFST_RESETVAL (0x0000u)
#define CSL_CCDC_DATAOFST_HOFST_MASK (0x00FFu)
#define CSL_CCDC_DATAOFST_HOFST_SHIFT (0x0000u)
#define CSL_CCDC_DATAOFST_HOFST_RESETVAL (0x0000u)
#define CSL_CCDC_DATAOFST_RESETVAL (0x0000u)
#define CSL_IPIPE_INPUT_LINE_CONFINED (1)
#define RDRV_RESZ__AUTO_CALC (-1)
#define CSL_IPIPE_AUTO_CALC (-1)
#define CSL_IPIPE_MAX_WIDTH (1344)
typedef enum {
/** 1/2 * VPSS CLK */
IPIPEIF_ONE_HALF = IPIPEIF_CFG_CLKDIV_ONE_HALF,
/** 1/3 * VPSS CLK */
IPIPEIF_ONE_THIRD = IPIPEIF_CFG_CLKDIV_ONE_THIRD,
/** 1/4 * VPSS CLK */
IPIPEIF_ONE_FOURTH = IPIPEIF_CFG_CLKDIV_ONE_FOURTH,
/** 1/5 * VPSS CLK */
IPIPEIF_ONE_FIFTH = IPIPEIF_CFG_CLKDIV_ONE_FIFTH,
/** 1/6 * VPSS CLK */
IPIPEIF_ONE_SIXTH = IPIPEIF_CFG_CLKDIV_ONE_SIXTH,
/** 1/8 * VPSS CLK */
IPIPEIF_ONE_EIGHTH = IPIPEIF_CFG_CLKDIV_ONE_EIGHTH,
/** 1/16 * VPSS CLK */
IPIPEIF_ONE_SIXTEENTH = IPIPEIF_CFG_CLKDIV_ONE_SIXTEENTH,
/** 1/32 * VPSS CLK */
IPIPEIF_ONE_THIRTYSECOND = IPIPEIF_CFG_CLKDIV_ONE_THIRTYSECOND,
/** Auto-calculate Minimum IPIPEIF Clock Divider / HD/VD timing combination to perform required operation */
IPIPEIF_AUTOCALC
} IpipeifClkDiv;
typedef enum {
/** Bayer input, YCbCr (or RGB) output */
CSL_IPIPE_RAW2YUV = 0,
/** Bayer input, bayer output */
CSL_IPIPE_RAW2RAW,
/** Bayer input, boxcar output */
CSL_IPIPE_RAW2BOX,
/** YCbCr (16bit) input, YCbCr (or RGB) output */
CSL_IPIPE_YUV2YUV,
/** Bayer input passes through the IPIPE unaltered (typically for darframe subtract in still capture mode) */
CSL_IPIPE_RAWPASSTHRU
} CSL_IpipeDataPaths;
typedef enum {
RDRV_RESZ__YUV422_INPUT , ///< YUV 4:2:2 interleaved input
RDRV_RESZ__RAW_INPUT ///< Raw Bayer input
} RDRV_RESZ_InputType_t;
typedef struct _PREVIEW_RESIZE_INIT
{
UINT16 wInWidth; // Input Stream dimensions
UINT16 wInHeight; // could be a small window within larger
UINT16 wInBufWidth; // Input buffer stride, typically InWidth rounded up by 16
UINT16 wOutWidth; // Desired Output Size
UINT16 wOutHeight;
UINT16 outBufWidth;
UINT16 wOutBufWidth;
UINT16 wOutBufHeight;
UINT32 inaddr;
UINT32 outaddr;
} PREVIEW_RESIZE_INIT, *PPREVIEW_RESIZE_INIT;
typedef struct {
UINT16 outputWidth; ///< output width, in pixels
UINT16 outputHeight; ///< output height, in lines
UINT16 outputLineOffset; ///< output line offset, in pixels, must be multiple of 32bytes
UINT32 outputAddr; ///< output data address
INT16 outputBufHeight; ///< output buffer height for circular buffer operation, set to RDRV_RESZ__AUTO_CALC, if circular buffer operation is not required
} RDRV_RESZ_OutputInfo_t;
typedef struct {
RDRV_RESZ_InputType_t inputType; ///< [I ] Input data type, YUV422 or RAW data
UINT16 inputStartX; ///< [I ] Valid Input Start Horizontal position, in pixels
UINT16 inputStartY; ///< [I ] Valid Input Start Vertical position, in lines
UINT16 inputWidth; ///< [I ] Valid Input Width, in pixels
UINT16 inputHeight; ///< [I ] Valid Input Height, in lines
UINT16 inputLineOffset; ///< [I ] Input Line Offset, in pixels, must be multiple of 32bytes
UINT32 inputAddr; ///< [I ] Input data address, must be 32byte aligned
RDRV_RESZ_OutputInfo_t *pRszA; ///< [I ] Output information for resizer A, set to NULL, if resizer A output is not required
RDRV_RESZ_OutputInfo_t *pRszB; ///< [I ] Output information for resizer B, set to NULL, if resizer B output is not required
INT16 numLinesPerResize; ///< [I ] Number of lines per resize, set to RDRV_RESZ__AUTO_CALC, if horizontal slicing is not required
INT16 numHorzSlices; ///< [IO] INPUT: Number of horizontal slices, set to 1, if horizontal slicing is not required \n OUTPUT: Number of horizontal slices calculated by the API
INT16 numVertSlices; ///< [ O] Number of vertical slices that will be required to do the resizing
INT16 clkDiv; ///< [I ] IPIPE Clock Divide Ratio, 2..32, used to control IPIPE Clock speed, usually this parameter is set based on current external memory bandwidth availability
} RDRV_RESZ_ResizeInfo_t;
typedef struct CSL_IpipeRszSliceInfo_{
/** [O ] Resizer input horizontal start pixel */
UINT8 stPixIn;
/** [O ] Resizer horizontal start phase */
UINT16 stPhase;
/** [O ] Resizer output width */
UINT16 outWidth;
/** [O ] Resizer output horizontal start pixel */
UINT8 stPixOut;
/** [O ] IPIPEIF input address */
void *inAddr;
/** [O ] Resizer output address */
void *outAddr;
} CSL_IpipeRszSliceInfo;
typedef struct CSL_IpipeRszStatus_{
/** Selects which resizer to query: #CSL_IPIPE_RZA, #CSL_IPIPE_RZB */
UINT8 rszSelect;
/** Phase value of last line of the previous resize process: @n
(valid when CSL_IpipeResizerConfig::tmm = #CSL_IPIPE_INPUT_LINE_CONFINED) */
UINT16 valLastPhase;
/** The number of actually produced lines of the previous resize process @n
(valid when CSL_IpipeResizerConfig::tmm = #CSL_IPIPE_INPUT_LINE_CONFINED) */
UINT16 numLastLines;
/** Vertical position of last line of the previous resize process in the output memory space */
UINT16 vLastSdr;
} CSL_IpipeRszStatus;
typedef struct CSL_IpipeifTimingConfig_{
/** Select clock source: #CSL_IPIPEIF_CLK_PCLK, #CSL_IPIPEIF_CLK_SDRAM */
UINT8 clkSelect;
/** SDRAM clock divider (available when clkSelect = #CSL_IPIPEIF_CLK_SDRAM) */
IpipeifClkDiv clkDiv;
/** Set HD interval */
UINT16 hdInterval;
/** Set VD interval */
UINT16 vdInterval;
}CSL_IpipeifTimingConfig;
typedef struct CSL_IpipeRszFmDivOutput_{
/** [I ] Output width of frame */
UINT16 outputWidth;
/** [I ] Output height of frame */
UINT16 outputHeight;
/** [I ] Starting address of output image in SDRAM */
void *outputAddr;
/** [I ] Horizontal line offset */
UINT16 outputLineOffsetH;
/** [I ] Height of output buffer. Resize params will be setup such that after outputBufHeight
is reached, data will be output again from outputAddr in a Ring buffer fashion. If
outputBufHeight is 0 or >= outputHeight, no ring buffer is implemented.
*/
UINT16 outputBufHeight;
/** [O ] Horizontal resize ratio value calculated by the CSL_ipipeCalcRszFmDivPrm() function */
UINT16 hRsz;
/** [O ] Vertical resize ratio value calculated by the CSL_ipipeCalcRszFmDivPrm() function */
UINT16 vRsz;
/** [O ] Can be NULL for CSL_ipipeCalcRszPrm(). If the CSL_ipipeCalcRszFmDivPrm() function returns a
CSL_IpipeRszPrm::numVertSlices value > 1, then this should be set to point to an array of
type CSL_IpipeSliceInfo with numVertSlices elements (i.e. pSliceInfo[numVertSlices]) before
calling the CSL_ipipeCalcRszSlicePrm() function.
*/
CSL_IpipeRszSliceInfo *pSliceInfo;
/** [O ] This should point the instance of CSL_IpipeRszStatus that is returned from the CSL_ipipeRszStatus()
at least once for each row of blocks before calling the CSL_ipipeSetRszSlicePrm() function for the first
block of a new row. This should be allocated before the CSL_ipipeCalcRszSlicePrm() function is called so
that it can initialize it accordingly.
*/
CSL_IpipeRszStatus *pRszStatus;
/** [O ] Internal parameter to calculate output line of next row of blocks */
UINT16 rpsNew;
/** [O ] Internal parameter to keep track of cumulative number of output lines generated */
UINT16 accOutLines;
} CSL_IpipeRszFmDivOutput;
typedef struct CSL_IpipeRszFmDivPrm_{
/** [I ] Input width of frame */
UINT16 inputWidth;
/** [I ] Input height of frame */
UINT16 inputHeight;
/** [I ] Starting address of image */
void *inputAddr;
/** [I ] Horizontal line offset */
UINT16 inputLineOffsetH;
/** [I ] Configuration of RZA output parameters (if RZA is disabled, set to NULL) */
CSL_IpipeRszFmDivOutput *rza;
/** [I ] Configuration of RZB output parameters (if RZB is disabled, set to NULL) */
CSL_IpipeRszFmDivOutput *rzb;
/** [I ] Overlap pixels per side due to any processing done before the resizer
(i.e. CFA, NF, YUV444 to 422, & YEE) This can either be set explicitly or automatically
calculated by the API by passing the #CSL_IPIPE_AUTO_CALC value. (NOTE: if auto-calc is
selected, then the CSL_ipipeCalcRszFmDivPrm() function requires that other IPIPE parameters be
set first so that the function can determine the overlap by reading the register values). */
INT16 ipipeOverlapH;
/** [I ] Overlap lines per side due to any processing done before the resizer
(i.e. CFA, NF, & YEE) This can either be set explicitly or automatically calculated
by the API by passing the #CSL_IPIPE_AUTO_CALC value. (NOTE: if auto-calc is selected,
then the CSL_ipipeCalcRszFmDivPrm() function requires that other IPIPE parameters be set first
so that the function can determine the overlap by reading the register values). */
INT16 ipipeOverlapV;
/** [I/O ] Number of input lines per resize (b value in TRM) if user wants to split image into
horizontal slices (Frame Division Mode - H). This can either be set explicitly or automatically
calculated by the CSL_ipipeCalcRszFmDivPrm() function. To auto-calculate based on the
#numHorzSlices value, pass the #CSL_IPIPE_AUTO_CALC value. This value must be even. This value
may be slighly decrimented to an even number (no more than by 3) to simplify the computations. */
INT16 numLinesPerResize;
/** [I/O ] Number of horizontal slices if user wants to split image into horizontal slices
(Frame Division Mode - H). This can either be set explicitly or automatically
calculated by the CSL_ipipeCalcRszFmDivPrm() function. To auto-calculate based on the
#numLinesPerResize value, pass the #CSL_IPIPE_AUTO_CALC value. */
INT16 numHorzSlices;
/** [O ] Number of vertical slices (Minimal number returned from the CSL_ipipeCalcRszFmDivPrm()
function)*/
UINT16 numVertSlices;
/** [O ] Total horizontal overlap on each side (Returned from the CSL_ipipeCalcRszFmDivPrm() function) */
UINT16 totalOverlapH;
/** [O ] Total vertical overlap on each side (Returned from the CSL_ipipeCalcRszFmDivPrm() function) */
UINT16 totalOverlapV;
/** [O ] IPIPEIF & IPIPE input width (calculated by the CSL_ipipeCalcRszSlicePrm() function) */
UINT16 hNum;
/** [I/O ] If the frame is divided into horizontal slices, then this keeps track of the current
row which is being operated on. This is automatically updated by the CSL_ipipeSetRszSlicePrm()
fuction. */
UINT8 rowNum;
/** [I/O ] If the frame is divided into vertical slices, then this keeps track of the current
column which is being operated on. This is automatically updated by the CSL_ipipeSetRszSlicePrm()
fuction. */
UINT8 colNum;
} CSL_IpipeRszFmDivPrm;
typedef struct {
CSL_IpipeRszFmDivPrm rszFmDivPrm;
CSL_IpipeRszFmDivOutput rszFmDivOutA;
CSL_IpipeRszSliceInfo sliceInfoA[RDRV_RESZ_SPEC__MAX_SLICES];
CSL_IpipeRszStatus rszStatusA;
CSL_IpipeRszFmDivOutput rszFmDivOutB;
CSL_IpipeRszSliceInfo sliceInfoB[RDRV_RESZ_SPEC__MAX_SLICES];
CSL_IpipeRszStatus rszStatusB;
CSL_IpipeifTimingConfig ipipeifTiming;
} RDRV_RESZ_SPEC_ModeData_t;
BOOL VideoHW_Init(void);
BOOL VideoHW_Deinit(void);
BOOL VideoHW_Close(void);
BOOL VideoHW_Open(void);
BOOL VideoHW_SetTransColor(BYTE *pbColorMask);
BOOL VideoHW_GetTransColor(BYTE *pbColorMask);
DWORD VideoHW_MonitorThread(PVOID pParms);
BYTE VideoHW_CheckActiveSignal(void);
BYTE VideoHW_GetActiveSignal(void);
BYTE VideoHW_Get_NTS_PAL_Signal(void);
BOOL VideoHW_SetBright(BYTE *pbColorMask);
BYTE VideoHW_GetBright(void);
BOOL VideoHW_SetCONTRAST(BYTE * pbColorMask);
BYTE VideoHW_GetCONTRAST(void);
BOOL VideoHW_SetHue(BYTE *pbColorMask);
BYTE VideoHW_GetHue(void);
BOOL VideoHW_SetSaturation(BYTE * pbColorMask);
BYTE VideoHW_GetSaturation(void);
BOOL VideoHW_CapturMap(DWORD *pRGBOut,DWORD dwLenOut);
#endif
/**********************************************************************
*文件名：Video_hw.cpp
*创建日期：2009.03.26
*作者：heyongshan
*文件说明：TI TMS320DM350 VIDEO Driver
*
************************************************************************/
#include <windows.h>
#include <nkintr.h>
#include <ceddk.h>
#include <oal.h>
#include <dm350.h>
#include <dm350_gio_lib.h>
#include <dm350_i2c_lib.h>
#include <dm350_clkc_lib.h>
#include "softi2c.h"
#include "Video_hw.h"
#include "YUVTable.h"
#define CCDC_FRAME_BUFFER_VIRADDR (0xA7D00000)
#define VIDEO_FRAME_BUFFER_VIRADDR (0xA7E00000)
#define CCDC_FRAME_BUFFER_PHYADDR (0x87D00000)
#define VIDEO_FRAME_BUFFER_PHYADDR (0x87E00000)
#define DIS_SDRAM_PHYADDR_BASE (0x80000000)
#define DIS_SDRAM_VALADDR_BASE (0xA0000000)
#define CCDC_FRAME_BUFFER_PHYADDR_TEST (0x87D00000+720*8)
#define GIO_TVP5150_SUSPEND GIO_PORT_0
#define GIO_TVP5150_RESET GIO_PORT_46
#define VDECADDR 0XBA
/* tvp5150 configuration data */
static const UINT8 vdecArray[] = {
0x03,0x0f,
0x0d, 0X7,//0x07,
0x0f,0x00,
0x28, 0x00,
};
// Global variables.
HANDLE g_hVideoFrameThread;
HANDLE g_hVideoFrameEvent = NULL;
HANDLE g_hVideoThreadStopedEvent = NULL;
DWORD g_dwSysIntr_Video = SYSINTR_UNDEFINED;
BYTE *m_VirtualCCDCFrameBuffer = NULL ;
BYTE *m_VirtualVideoFrameBuffer = NULL;
BOOL IsPal = FALSE;
BOOL bThreadTerminal = FALSE;
static volatile DM350_VPSS_CLK_REG* g_pVpssClk = NULL;
static volatile DM350_VPSS_BUFLOGIC_REG* g_pVpssBufLogic = NULL;
static volatile DM350_IPIPEIF_REG* g_pVpssIpipeIf = NULL;
static volatile DM350_IPIPE_REG* g_pVpssIpipe = NULL;
static volatile DM350_CCDC_REG* g_pVpssCcdc = NULL;
static volatile DM350_OSD_REG* g_pOsd = NULL;
static volatile DM350_VENC_REG* g_pVenc = NULL;
static BYTE uGrabMap;
static void delay(volatile int time)
{
for (; time>0; time--);
}
BYTE Tvp5150ReadReg(BYTE reg )
{
UINT8 success,ret;
I2C_Grab();
EnableHardwreI2C(FALSE);
i2cInit();
ret = softi2cReadReg((UINT8)VDECADDR,
reg, &success);
EnableHardwreI2C(TRUE);
I2C_Release();
return ret;
}
void Tvp5150WriteReg(BYTE reg,BYTE value)
{
UINT8 success;
I2C_Grab();
EnableHardwreI2C(FALSE);
i2cInit();
softi2cWriteReg((UINT8)VDECADDR,(UINT8)reg,
value, &success);
EnableHardwreI2C(TRUE);
I2C_Release();
return ;
}
BOOL GetPalMode()
{
BYTE ret;
BYTE value = 0x8C;
ret=Tvp5150ReadReg(value);
// RETAILMSG(true,(L"mode=%d\r\n",value));
ret=ret&0xf;
if (ret==1 || ret==9)
{
return false;
}
return true;
}
BOOL HaveSign()
{
BYTE ret;
BYTE value = 0X88;
ret=Tvp5150ReadReg(value);
ret=ret&0xf;
if (ret == 0x0e)
{
return TRUE;;
}
return FALSE;
}
void Config_Tvp5150(void)
{
UINT16 j, flag=0;
UINT8 success,ret;
I2C_Grab();
EnableHardwreI2C(FALSE);
GIO_Grab();
GIO_SetDirection(GIO_TVP5150_SUSPEND, GIO_OUTPUT, FALSE);
GIO_SetBit(GIO_TVP5150_SUSPEND);
GIO_Release();
Sleep(100);
GIO_Grab();
GIO_ClearBit(GIO_TVP5150_RESET);
Sleep(100);
GIO_SetBit(GIO_TVP5150_RESET);
GIO_Release();
Sleep(100);
i2cInit();
for (j = 0; j < sizeof(vdecArray); j += 2)
{
softi2cWriteReg((UINT8)VDECADDR, vdecArray[j], vdecArray[j + 1], &success);
flag += success;
}
if (flag != I2C_SUCCESS)
RETAILMSG(1, (L"TVP5150: Register Write fail\r\n"));
flag = 0;
for (j = 0; j < sizeof(vdecArray); j += 2)
{
ret = softi2cReadReg((UINT8)VDECADDR, vdecArray[j], &success);
// RETAILMSG(1, (L"TVP5150: Register Read 0x09%x--->0x%x\r\n",vdecArray[j],ret));
flag += success;
}
if (flag != I2C_SUCCESS)
RETAILMSG(1, (L"TVP5150: Register Read fail\r\n"));
ret = softi2cReadReg((UINT8)VDECADDR, 1, &success);
// RETAILMSG(1, (L"TVP5150: Register Read 0x%x--->0x%x\r\n",1,ret));
EnableHardwreI2C(TRUE);
I2C_Release();
}
void TVP5150_Init()
{
if (!GIO_InitLibrary())
{
ERRORMSG(1, (L"TVP5150 : GIO_Init failed!\r\n"));
return; // failed
}
if (!CLKC_InitLibrary())
{
GIO_DeinitLibrary();
return; // failed
}
I2C_InitLibrary();
Sleep(1);
CLKC_Grab();
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO82_PCLK, 1, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO83_CAMWEN, 1, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO84_CAMVD, 1, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO85_CAMHD, 1, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO93TO86_YIN7TO0, 1, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO9594_CIN10, 1, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO9796_CIN32, 1, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO98_CIN4_SP12SDI_SPI2SDEN1_TWOBIT, 1, 1);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX0,PINMUX0_GIO99_CIN5_SPI2EN0_TWOBIT, 1, 1);
//For I2C PORT
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX3,PINMUX3_GIO14_I2CSCL, 0, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX3,PINMUX3_GIO15_I2CSDA, 0, 0);
SysDm350_SetPinMuxBit(SYSCTRL_PINMUX2,PINMUX2_EMD15TOD8_GIO53TO46, 1, 0);
CLKC_Release();
Config_Tvp5150();
return;
}
void PrevInit(void)
{
g_pVpssClk->CLKCTRL |= (1<<5);//enable ipipe clock
g_pVpssBufLogic->PCR = 0;
g_pVpssBufLogic->CCDCMUX = 0;
g_pVpssBufLogic->MEMCTRL = 0;
g_pVpssBufLogic->INTSTAT = 0x7fff;//clear interrupt
//OSD INTSEL0 VENC INTSEL1 RSZA INTSEL2 RSZB INTSEL3 SDR INTSEL4 IPIPEIF INTSEL5 CCDC_VDINT0 INTSEL6 CCDC_VDINT1 INTSEL7
g_pVpssBufLogic->INTSEL = ((OSDINT<<VPSS_INTSEL0_SHIFT)|
(VENCINT<<VPSS_INTSEL1_SHIFT)|
(IPIPE_INT2_RZA<<VPSS_INTSEL2_SHIFT)|
(IPIPE_INT3_RZB<<VPSS_INTSEL3_SHIFT)|
(IPIPE_INT1_SDR<<VPSS_INTSEL4_SHIFT)|
(IPIPEIFINT<<VPSS_INTSEL5_SHIFT)|
(CCDC_VDINT0<<VPSS_INTSEL6_SHIFT)|
(CCDC_VDINT1<<VPSS_INTSEL7_SHIFT));
//CCDC_VDINT2 INTSEL8
g_pVpssBufLogic->EVTSEL &= (~0XF);
g_pVpssBufLogic->EVTSEL |= (CCDC_VDINT2<<VPSS_INTSEL8_SHIFT);
g_pVpssIpipeIf->ENABLE = 0;
g_pVpssIpipeIf->CFG = (1<<10 | 3<<2 |1);//yuv sdram data path sdram clksel,ONE shot mode;
g_pVpssIpipeIf->RSZ = 16;// no scale down
g_pVpssIpipe->IPIPE_EN = 0;
}
BOOL CCDC_ConFigureVideo(UINT32 lineoffset)
{
g_pVpssCcdc->SYNCEN = (CSL_CCDC_SYNCEN_WEN_DISABLE<<CSL_CCDC_SYNCEN_WEN_SHIFT)|CSL_CCDC_SYNCEN_VDHDEN_DISABLE; // first diable vdhd and wen
g_pVpssClk->CLKCTRL |= (1<<6);//enable CCDC clock
g_pVpssCcdc->CSCCTL = 0;//disable color space converter
g_pVpssCcdc->DFCCTL = 0;//disable defect correction control
g_pVpssCcdc->LSCCFG1 = 0;//disable lens shading correct
g_pVpssCcdc->FMTCFG = 0;//disable sdram formatter
g_pVpssCcdc->MODESET = ((CSL_CCDC_MODESET_LPF_OFF<<CSL_CCDC_MODESET_LPF_SHIFT)| //LPF
( CSL_CCDC_MODESET_INPMOD_YCBCR8<< CSL_CCDC_MODESET_INPMOD_SHIFT)|//INPMOD
(CSL_CCDC_MODESET_PACK8_PACK_8_BITS_PIXEL<<CSL_CCDC_MODESET_PACK8_SHIFT)|//pack8
(CSL_CCDC_MODESET_DATASFT__1_BIT<<CSL_CCDC_MODESET_DATASFT_SHIFT)|
(CSL_CCDC_MODESET_FLDMODE_INTERLACED<<CSL_CCDC_MODESET_FLDMODE_SHIFT)| //FLDMODE
(CSL_CCDC_MODESET_DATAPOL_NORMAL<<CSL_CCDC_MODESET_DATAPOL_SHIFT)|
(CSL_CCDC_MODESET_EXWEN_NO_EXTERNAL_WEN<<CSL_CCDC_MODESET_EXWEN_SHIFT)|//EXWEN
(CSL_CCDC_MODESET_FLDPOL_POSITIVE<<CSL_CCDC_MODESET_FLDPOL_SHIFT)|//FIDPOL
(CSL_CCDC_MODESET_HDPOL_POSITIVE<<CSL_CCDC_MODESET_HDPOL_SHIFT)|//HDPOL
(CSL_CCDC_MODESET_VDPOL_POSITIVE<<CSL_CCDC_MODESET_VDPOL_SHIFT)|//VDPOL
(CSL_CCDC_MODESET_VDHDOUT_INPUT<<CSL_CCDC_MODESET_VDHDOUT_SHIFT));//VDHD direction
g_pVpssCcdc->HDWIDTH = 0;
g_pVpssCcdc->VDWIDTH = 0;
g_pVpssCcdc->PPLN = 0;
g_pVpssCcdc->LPFR = 0;
g_pVpssCcdc->SPH = 0;//260 FOR ITU601; //0 for itu656
g_pVpssCcdc->NPH = SOURCE_WIDTH_NTSC*2;//number of pixel horizontal
g_pVpssCcdc->SLV0 = 21;// debug
g_pVpssCcdc->SLV1 = 22;//debg
g_pVpssCcdc->NLV = SOURCE_HEIGHT_NTSC - 1;
g_pVpssCcdc->CULH = 0xffff;
g_pVpssCcdc->CULV = 0xff;
g_pVpssCcdc->HSIZE = lineoffset/32;
g_pVpssCcdc->SDOFST = (1<<9|1<<6|1<<3|1<<0);//0;
g_pVpssCcdc->STADRH = ((CCDC_FRAME_BUFFER_VIRADDR- DIS_SDRAM_VALADDR_BASE)/32)>>16;
g_pVpssCcdc->STADRL = ((CCDC_FRAME_BUFFER_VIRADDR- DIS_SDRAM_VALADDR_BASE)/32)&0xffff;
g_pVpssCcdc->CLAMP = 0;
g_pVpssCcdc->DCSUB = 0;
g_pVpssCcdc->COLPTN = 0;
g_pVpssCcdc->BLKCMP0= 0;
g_pVpssCcdc->BLKCMP1 = 0;
g_pVpssCcdc->MEDFILT = 0;
g_pVpssCcdc->RYEGAIN = 0;
g_pVpssCcdc->GRCYGAIN = 0;
g_pVpssCcdc->GBGGAIN = 0;
g_pVpssCcdc->BMGGAIN = 0;
g_pVpssCcdc->OFFSET = 0;
g_pVpssCcdc->OUTCLIP = 0;
g_pVpssCcdc->VDINT0 = 0;
g_pVpssCcdc->VDINT1 = 0;
g_pVpssCcdc->GAMMAWD = 0;
g_pVpssCcdc->REC656IF = 1;//1 for Video;//0 for ITU601
g_pVpssCcdc->CCDCFG = ((CSL_CCDC_CCDCFG_VDLC_LATCHEDONVSYNC<<CSL_CCDC_CCDCFG_VDLC_SHIFT)|
(CSL_CCDC_CCDCFG_MSBINVI_NORMAL<<CSL_CCDC_CCDCFG_MSBINVI_SHIFT)|
(CSL_CCDC_CCDCFG_BSWD_NORMAL<<CSL_CCDC_CCDCFG_BSWD_SHIFT)|
(CSL_CCDC_CCDCFG_Y8POS_ODDPIXEL<<CSL_CCDC_CCDCFG_Y8POS_SHIFT)|
(CSL_CCDC_CCDCFG_EXTRG_DISABLE<<CSL_CCDC_CCDCFG_EXTRG_SHIFT)|
(CSL_CCDC_CCDCFG_TRGSEL_FID_INPUT_PORT<<CSL_CCDC_CCDCFG_TRGSEL_SHIFT)|
(CSL_CCDC_CCDCFG_WENLOG_AND<<CSL_CCDC_CCDCFG_WENLOG_SHIFT)|
(CSL_CCDC_CCDCFG_FIDMD_LATCH_AT_VSYNC<<CSL_CCDC_CCDCFG_FIDMD_SHIFT)|
(CSL_CCDC_CCDCFG_BW656__8_BITS<<CSL_CCDC_CCDCFG_BW656_SHIFT)|
(CSL_CCDC_CCDCFG_YCINSWP_NO_YCIN_SWAP<<CSL_CCDC_CCDCFG_YCINSWP_SHIFT));
g_pVpssCcdc->SYNCEN = (CSL_CCDC_SYNCEN_WEN_ENABLE<<CSL_CCDC_SYNCEN_WEN_SHIFT)|CSL_CCDC_SYNCEN_VDHDEN_ENABLE; // Enable vdhd and wen
g_pVpssClk->CLKCTRL |= (1<<6);//enable CCDC clock
return TRUE;
}
void OSD_SetTransparency(void)
{
UINT16 OSDWIN0MD=0;
OSDWIN0MD = g_pOsd->OSDWIN0MD;
OSDWIN0MD &= 0xffc7;
g_pOsd->OSDWIN0MD = OSDWIN0MD;
}
void OSD_SetDisTransparency(void)
{
UINT16 OSDWIN0MD=0;
OSDWIN0MD = g_pOsd->OSDWIN0MD;
OSDWIN0MD |= 0x38;
g_pOsd->OSDWIN0MD = OSDWIN0MD;
}
void BSO_OSDSetVidWinAddress(UINT32 nAddr)
{
// RETAILMSG(1, (L"&&&&&&&&&&&BSO_OSDSetVidWinAddress\r\n"));
g_pOsd->VIDWINADH = (UINT16)(((nAddr - DIS_SDRAM_VALADDR_BASE)/ 32) >> 16) & 0x007F;
g_pOsd->VIDWIN0ADL = (UINT16)(((nAddr - DIS_SDRAM_VALADDR_BASE)/32) & 0xFFFF);
g_pOsd->VIDWIN0OFST = LCD_PHY_PIXEL_CY >> 4; // Line stride in 32 byte units
g_pOsd->VIDWINMD |= 1;
g_pVenc->VMOD |= 1;
OSD_SetTransparency();
g_pOsd->TRANSPVALL = 0x0000;
}
RDRV_RESZ_SPEC_ModeData_t gRDRV_RESZ_modeData;
int CSL_ipipeCalcRszFmDivPrm(CSL_IpipeRszFmDivPrm *data)
{
CSL_IpipeRszFmDivOutput *rszSet[2];
UINT8 i;
UINT16 maxOut = 0;
if(data == NULL)
return (-1);
if(!data->rza && !data->rzb)
return (-1);
rszSet[0]= data->rza;
rszSet[1]= data->rzb;
/** Calculate Resize ratios */
for(i=0; i<2; i++)
{
if(rszSet[i])
{
rszSet[i]->hRsz = (data->inputWidth << 8) / rszSet[i]->outputWidth;
if(rszSet[i]->hRsz < 32 || rszSet[i]->hRsz > 4096) // Check if ratio is out of range
return (-1);
rszSet[i]->vRsz = (data->inputHeight << 8) / rszSet[i]->outputHeight;
if(rszSet[i]->vRsz < 32 || rszSet[i]->vRsz > 4096) // Check if ratio is out of range
return (-1);
}
}
/** Determine slicing overlap due to IPIPE processes (if slicing is required) */
{
UINT8 oNfCfa, oYee;
oNfCfa = (g_pVpssIpipe->D2F_EN << 1) + 2; // Overlap due to NF + CFA
oYee = (g_pVpssIpipe->YEE_EN)*3; // Overlap due to YEE
if(data->ipipeOverlapH == CSL_IPIPE_AUTO_CALC)
{
if(g_pVpssIpipe->IPIPE_DPATHS)
data->ipipeOverlapH = 0;
else
data->ipipeOverlapH = oNfCfa + // Overlap due to NF + CFA
((g_pVpssIpipe->YUV_PHS == 3) ? 2 : 1); // Overlap due to YUV444 to YUV422
data->ipipeOverlapH += oYee; // Overlap due to YEE
}
if(data->ipipeOverlapV == CSL_IPIPE_AUTO_CALC)
{
if(g_pVpssIpipe->IPIPE_DPATHS)
data->ipipeOverlapV = 0;
else
data->ipipeOverlapV = oNfCfa; // Overlap due to NF + CFA
data->ipipeOverlapV += oYee; // Overlap due to YEE
}
}
/** Determine total slicing overlap including resizer (if slicing is required) */
{
UINT16 maxRsz = 0;
for(i=0; i<2; i++)
{
if(rszSet[i])
{
maxRsz = (rszSet[i]->hRsz > maxRsz) ? rszSet[i]->hRsz : maxRsz;
maxOut = (rszSet[i]->outputWidth > maxOut) ? rszSet[i]->outputWidth : maxOut;
}
}
if(maxRsz > 2560)
data->totalOverlapH = data->ipipeOverlapH + ((((maxRsz-1) >> 8)+1)<<1);
else
data->totalOverlapH = data->ipipeOverlapH + 20;
}
if(data->totalOverlapH%2) // if overlap is odd, make even to simplify algorithm
data->totalOverlapH++;
data->totalOverlapV = data->ipipeOverlapV;
/** Determine number of slices requried (Currently takes the MAX of slices based on input & output:
In future, performance optimization may be to use IPIPEIF downsizer, but there is a question of
quality) */
{
UINT32 numVSlicesOut, numVSlicesIn, sliceWidth;
numVSlicesOut = (maxOut-1) / CSL_IPIPE_MAX_WIDTH + 1;
if(data->inputWidth <= CSL_IPIPE_MAX_WIDTH)
numVSlicesIn = 1;
else
{
UINT8 totalOverlapHx2 = data->totalOverlapH << 1;
numVSlicesIn = (data->inputWidth - totalOverlapHx2 - 1)/(CSL_IPIPE_MAX_WIDTH - totalOverlapHx2) + 1;
while((sliceWidth = (data->inputWidth + 2*(numVSlicesIn-1)*data->totalOverlapH)/numVSlicesIn)%2)
data->totalOverlapH += 2;
}
if((CSL_IPIPE_MAX_WIDTH-sliceWidth)<16)
numVSlicesIn++;
// data->numVertSlicesH = max(numVSlicesOut, numVSlicesIn);
data->numVertSlices = (numVSlicesOut > numVSlicesIn) ? numVSlicesOut : numVSlicesIn;
}
if(data->numLinesPerResize == CSL_IPIPE_AUTO_CALC)
{
if (data->numHorzSlices > 0)
data->numLinesPerResize = data->inputHeight / data->numHorzSlices;
else
{
data->numHorzSlices = 1;
data->numLinesPerResize = data->inputHeight;
}
}
else if(data->numHorzSlices == CSL_IPIPE_AUTO_CALC)
{
if (data->numLinesPerResize)
data->numHorzSlices = (data->inputHeight-1) / data->numLinesPerResize + 1;
else
{
data->numHorzSlices = 1;
data->numLinesPerResize = data->inputHeight;
}
}
else if(!data->numLinesPerResize || data->numLinesPerResize >= data->inputHeight)
data->numHorzSlices = 1;
else
data->numLinesPerResize = data->inputHeight / data->numHorzSlices;
if(data->numLinesPerResize%2)
data->numLinesPerResize--;
// Check for condition if the number of lines per resize is too many for the number of slices calculated/specified
for(i=0; i<2; i++)
{
if(rszSet[i])
{
UINT32 outLines = ((data->numLinesPerResize*data->numHorzSlices-1)<<8)/rszSet[i]->vRsz+1;
if((outLines-rszSet[i]->outputHeight) >= (UINT16)data->numLinesPerResize)
data->numLinesPerResize -= 2;
}
}
return (0);
}
int CSL_ipipeCalcRszSlicePrm(CSL_IpipeRszFmDivPrm *data)
{
CSL_IpipeRszFmDivOutput *rszSet[2];
UINT16 pixStart, sliceWidth, acch, accOutWidth, x, X, x1, xFinal;
UINT8 i, j, inPos, max;
UINT8 maxNum = 0;
if(data == NULL)
return (-1);
rszSet[0]= data->rza;
rszSet[1]= data->rzb;
pixStart = ((UINT32)data->inputAddr%32)>>1;
sliceWidth = (data->inputWidth + 2*(data->numVertSlices-1)*data->totalOverlapH)/data->numVertSlices;
for(j=0; j<2; j++)
{
if(rszSet[j])
{
if(rszSet[j]->pSliceInfo == NULL)
return (-1);
/**************************************************/
// FIRST SLICE
acch = sliceWidth - data->totalOverlapH;
if((rszSet[j]->pSliceInfo[0].outWidth = ((acch-1)<<8)/rszSet[j]->hRsz)%2)
rszSet[j]->pSliceInfo[0].outWidth++;
//RETAILMSG(DEBUG_PHOTO,(L"out width = %d ,out height =%d\r\n",rszSet[j]->pSliceInfo[0].outWidth,rszSet[j]->outputHeight));
accOutWidth = rszSet[j]->pSliceInfo[0].outWidth;
rszSet[j]->pSliceInfo[0].stPhase = 0;
rszSet[j]->pSliceInfo[0].stPixOut = 0;
rszSet[j]->pSliceInfo[0].stPixIn = max = (UINT8)pixStart;
rszSet[j]->pSliceInfo[0].inAddr = (void *)((UINT32)data->inputAddr & 0xFFFFFFE0);
rszSet[j]->pSliceInfo[0].outAddr = rszSet[j]->outputAddr;
/**************************************************/
// REMAINING SLICES
for(i=1; i<data->numVertSlices; i++)
{
x = acch - data->totalOverlapH;
if(i == data->numVertSlices-1) // IF last slice
rszSet[j]->pSliceInfo[i].outWidth = rszSet[j]->outputWidth - accOutWidth;
else
{
acch += sliceWidth - 2*data->totalOverlapH;
if((rszSet[j]->pSliceInfo[i].outWidth = ((acch-1)<<8)/rszSet[j]->hRsz - accOutWidth)%2)
rszSet[j]->pSliceInfo[i].outWidth++;
}
X = ((((x<<8)-1)/rszSet[j]->hRsz)+2)& 0xFFFFFFFE;
x1 = ((X*rszSet[j]->hRsz)>>8) & 0xFFFFFFFE;
inPos = x1-x;
xFinal = (x+pixStart) & 0xFFFFFFF0;
rszSet[j]->pSliceInfo[i].stPhase = X*rszSet[j]->hRsz - (x1<<8);
rszSet[j]->pSliceInfo[i].stPixOut = accOutWidth-X;
rszSet[j]->pSliceInfo[i].stPixIn = inPos + x - xFinal;
max = x + pixStart - xFinal;
maxNum = (maxNum > max) ? maxNum : max;
rszSet[j]->pSliceInfo[i].inAddr = (void *)(((UINT32)data->inputAddr & 0xFFFFFFE0) + (xFinal<<1));
rszSet[j]->pSliceInfo[i].outAddr = (void *)((UINT32)rszSet[j]->pSliceInfo[i-1].outAddr +
(rszSet[j]->pSliceInfo[i-1].outWidth<<1));
accOutWidth += rszSet[j]->pSliceInfo[i].outWidth;
}
rszSet[j]->rpsNew = 0;
rszSet[j]->accOutLines = 0;
rszSet[j]->pRszStatus->rszSelect = j;
rszSet[j]->pRszStatus->valLastPhase = 256;
rszSet[j]->pRszStatus->numLastLines = 0;
rszSet[j]->pRszStatus->vLastSdr = 0;
}
}
data->hNum = sliceWidth + maxNum;
data->rowNum = 0;
data->colNum = 0;
return 0;
}
int CSL_ipipeSetRszSlicePrm(
CSL_IpipeRszFmDivPrm *data
){
CSL_IpipeRszFmDivOutput *rszSet[2];
UINT8 j;
UINT32 outAddr, inAddr;
if(data == NULL) return (-1);
rszSet[0]= data->rza;
rszSet[1]= data->rzb;
for(j=0; j<2; j++)
{
if(rszSet[j])
{
CSL_IpipeRszSliceInfo sliceData;
if(rszSet[j]->pSliceInfo == NULL) return (-1);
sliceData = rszSet[j]->pSliceInfo[data->colNum];
g_pVpssIpipe->RSZ[j].RSZ_I_HST = sliceData.stPixIn;
g_pVpssIpipe->RSZ[j].RSZ_H_PHS = sliceData.stPhase;
g_pVpssIpipe->RSZ[j].RSZ_O_HSZ = sliceData.outWidth-1;
g_pVpssIpipe->RSZ[j].RSZ_O_HST = sliceData.stPixOut;
g_pVpssIpipe->RSZ[j].RSZ_SDR_BAD_H = ((UINT32)sliceData.outAddr >> 16);
g_pVpssIpipe->RSZ[j].RSZ_SDR_BAD_L = (UINT32)sliceData.outAddr;
if(!data->colNum) // Get vertical information for next row of columns
{
UINT16 pLast;
rszSet[j]->rpsNew = (rszSet[j]->pRszStatus->numLastLines) ? // ipipeRegs->RSZ[j].RSZ_V_SIZ_O
(rszSet[j]->pRszStatus->vLastSdr+1) % rszSet[j]->outputBufHeight :
rszSet[j]->pRszStatus->vLastSdr; //ipipeRegs->RSZ[j].RSZ_SDR_PTR_O
rszSet[j]->accOutLines += rszSet[j]->pRszStatus->numLastLines;
g_pVpssIpipe->RSZ[j].RSZ_SDR_PTR_S = rszSet[j]->rpsNew;
g_pVpssIpipe->RSZ[j].RSZ_V_PHS = ((pLast = rszSet[j]->pRszStatus->valLastPhase) < 256) ? //ipipeRegs->RSZ[j].RSZ_V_PHS_O
pLast + rszSet[j]->vRsz - 256:
pLast - 256;
if(!data->rowNum) // First Row
g_pVpssIpipe->RSZ[j].RSZ_I_VST = 0;
else
{
g_pVpssIpipe->RSZ[j].RSZ_I_VST = data->totalOverlapV;
if(data->rowNum == data->numHorzSlices-1) // Last Row
{
UINT32 lastInSize = data->inputHeight - data->rowNum*data->numLinesPerResize + data->totalOverlapV;
g_pVpssIpipe->RSZ[j].RSZ_I_VSZ = lastInSize;
g_pVpssIpipe->RSZ_SEQ &= (~CSL_IPIPE_INPUT_LINE_CONFINED);
g_pVpssIpipe->RSZ[j].RSZ_O_VSZ = rszSet[j]->outputHeight - rszSet[j]->accOutLines - 1;
g_pVpssIpipeIf->VNUM = lastInSize+1;
g_pVpssIpipeIf->LPFR = g_pVpssIpipeIf->VNUM + 11;
g_pVpssIpipe->IPIPE_VSZ = g_pVpssIpipeIf->VNUM-1;
}
}
}
outAddr = (UINT32)sliceData.outAddr + rszSet[j]->outputLineOffsetH * rszSet[j]->rpsNew;
g_pVpssIpipe->RSZ[j].RSZ_SDR_SAD_H = (outAddr >> 16);
g_pVpssIpipe->RSZ[j].RSZ_SDR_SAD_L = outAddr;
inAddr = (UINT32)sliceData.inAddr;
}
}
inAddr += data->rowNum*data->numLinesPerResize*data->inputLineOffsetH;
g_pVpssIpipeIf->ADDRU = inAddr >> 21;
g_pVpssIpipeIf->ADDRL = inAddr >> 5;
if(!(data->colNum = ++data->colNum % data->numVertSlices))
data->rowNum = ++data->rowNum % data->numHorzSlices;
return (0);
}
int CSL_ipipeSetRszFmDivPrm(
CSL_IpipeRszFmDivPrm *data
){
CSL_IpipeRszFmDivOutput *rszSet[2];
UINT8 j;
if(data == NULL)
return (-1);
g_pVpssIpipeIf->HNUM = data->hNum;
g_pVpssIpipeIf->PPLN = data->hNum + 8;
g_pVpssIpipeIf->ADOFS = data->inputLineOffsetH >> 5;
g_pVpssIpipe->IPIPE_HST = 0;
g_pVpssIpipe->IPIPE_HSZ = data->hNum-1;
g_pVpssIpipe->IPIPE_VST = 1;
// Frame Division Mode - H implemented
if(data->numHorzSlices > 1)
{
g_pVpssIpipe->RSZ_SEQ |= CSL_IPIPE_INPUT_LINE_CONFINED;
g_pVpssIpipeIf->VNUM = data->numLinesPerResize + 2*data->totalOverlapV+1; // Middle Rows (most of the time, largest case)
g_pVpssIpipeIf->LPFR = g_pVpssIpipeIf->VNUM + 11; // Non optimized for now
g_pVpssIpipe->IPIPE_VSZ = g_pVpssIpipeIf->VNUM-1;
}
else
{
g_pVpssIpipe->RSZ_SEQ &= (~CSL_IPIPE_INPUT_LINE_CONFINED);
g_pVpssIpipeIf->VNUM = data->inputHeight;
g_pVpssIpipeIf->LPFR = data->inputHeight + 11; // Non optimized for now
g_pVpssIpipe->IPIPE_VSZ = data->inputHeight-1;
}
rszSet[0]= data->rza;
rszSet[1]= data->rzb;
for(j=0; j<2; j++)
{
if(rszSet[j])
{
g_pVpssIpipe->RSZ[j].RSZ_H_DIF = rszSet[j]->hRsz;
g_pVpssIpipe->RSZ[j].RSZ_V_DIF = rszSet[j]->vRsz;
g_pVpssIpipe->RSZ[j].RSZ_SDR_OFT = rszSet[j]->outputLineOffsetH;
g_pVpssIpipe->RSZ[j].RSZ_O_VSZ = rszSet[j]->outputHeight-1; // may change in slice instead?
g_pVpssIpipe->RSZ[j].RSZ_SDR_PTR_E = rszSet[j]->outputBufHeight;
if(data->numHorzSlices > 1)
g_pVpssIpipe->RSZ[j].RSZ_I_VSZ = data->numLinesPerResize + data->totalOverlapV;//+1;
}
}
CSL_ipipeSetRszSlicePrm( data);
return (0);
}
int RDRV_RESZ_SPEC_Setup(RDRV_RESZ_ResizeInfo_t * pPrm)
{
RDRV_RESZ_ResizeInfo_t *pReszInfo = (RDRV_RESZ_ResizeInfo_t *)pPrm;
CSL_IpipeRszFmDivPrm *rszFmDivPrm;
CSL_IpipeRszFmDivOutput *rszFmDivOutA;
CSL_IpipeRszFmDivOutput *rszFmDivOutB;
UINT32 inputStartXOffset, inputStartX;
if( pPrm==NULL)
{
return (-1);
}
pReszInfo->inputWidth = pReszInfo->inputWidth & (~0x3); // make multiple of 4 pixels
g_pVpssIpipe->GCL_ARM = 1;
g_pVpssIpipe->GCL_CCD = 0X7;
g_pVpssIpipe->GCL_SDR = 1;
g_pVpssIpipe->GCL_ARM = 1;
rszFmDivPrm = &gRDRV_RESZ_modeData.rszFmDivPrm;
rszFmDivOutA = &gRDRV_RESZ_modeData.rszFmDivOutA;
rszFmDivOutB = &gRDRV_RESZ_modeData.rszFmDivOutB;
rszFmDivPrm->inputWidth = pReszInfo->inputWidth;
rszFmDivPrm->inputHeight = pReszInfo->inputHeight;
rszFmDivPrm->inputLineOffsetH = pReszInfo->inputLineOffset * 2;
inputStartX = (pReszInfo->inputStartX/16)*16;
inputStartXOffset = (pReszInfo->inputStartX%16);
rszFmDivPrm->inputAddr = (void*)(pReszInfo->inputAddr
+ (UINT32)pReszInfo->inputStartY*rszFmDivPrm->inputLineOffsetH
+ (UINT32)inputStartX * 2
);
rszFmDivPrm->ipipeOverlapH = CSL_IPIPE_AUTO_CALC;
rszFmDivPrm->ipipeOverlapV = CSL_IPIPE_AUTO_CALC;
if(pReszInfo->numLinesPerResize==RDRV_RESZ__AUTO_CALC)
rszFmDivPrm->numLinesPerResize = CSL_IPIPE_AUTO_CALC;
else
rszFmDivPrm->numLinesPerResize = pReszInfo->numLinesPerResize;
if(pReszInfo->numHorzSlices==RDRV_RESZ__AUTO_CALC)
rszFmDivPrm->numHorzSlices = CSL_IPIPE_AUTO_CALC;
else
rszFmDivPrm->numHorzSlices = pReszInfo->numHorzSlices;
rszFmDivPrm->rza = NULL;
rszFmDivPrm->rzb = NULL;
if(pReszInfo->pRszA!=NULL)
{
rszFmDivPrm->rza = rszFmDivOutA;
rszFmDivOutA->outputWidth = pReszInfo->pRszA->outputWidth;
rszFmDivOutA->outputHeight = pReszInfo->pRszA->outputHeight;
rszFmDivOutA->outputLineOffsetH= pReszInfo->pRszA->outputLineOffset * 2;
rszFmDivOutA->outputAddr = (void*)pReszInfo->pRszA->outputAddr;
if(pReszInfo->pRszA->outputBufHeight==RDRV_RESZ__AUTO_CALC)
rszFmDivOutA->outputBufHeight = rszFmDivOutA->outputHeight;
else
rszFmDivOutA->outputBufHeight = pReszInfo->pRszA->outputBufHeight;
rszFmDivOutA->pSliceInfo = gRDRV_RESZ_modeData.sliceInfoA;
rszFmDivOutA->pRszStatus = &gRDRV_RESZ_modeData.rszStatusA;
}
if(pReszInfo->pRszB!=NULL)
{
rszFmDivPrm->rzb = rszFmDivOutB;
rszFmDivOutB->outputWidth = pReszInfo->pRszB->outputWidth;
rszFmDivOutB->outputHeight = pReszInfo->pRszB->outputHeight;
rszFmDivOutB->outputLineOffsetH= pReszInfo->pRszB->outputLineOffset * 2;
rszFmDivOutB->outputAddr = (void*)pReszInfo->pRszB->outputAddr;
if(pReszInfo->pRszB->outputBufHeight==RDRV_RESZ__AUTO_CALC)
rszFmDivOutB->outputBufHeight = rszFmDivOutB->outputHeight;
else
rszFmDivOutB->outputBufHeight = pReszInfo->pRszB->outputBufHeight;
rszFmDivOutB->pSliceInfo = gRDRV_RESZ_modeData.sliceInfoB;
rszFmDivOutB->pRszStatus = &gRDRV_RESZ_modeData.rszStatusB;
}
CSL_ipipeCalcRszFmDivPrm( rszFmDivPrm);
if(rszFmDivPrm->numVertSlices==1)
{
rszFmDivPrm->inputWidth += rszFmDivPrm->totalOverlapH;
}
// check if total slices less than RDRV_RESZ_SPEC__MAX_SLICES, otherwise increase RDRV_RESZ_SPEC__MAX_SLICES
// ROSA_Assert(rszFmDivPrm->numHorzSlices * rszFmDivPrm->numVertSlices <= RDRV_RESZ_SPEC__MAX_SLICES);
CSL_ipipeCalcRszSlicePrm( rszFmDivPrm);
pReszInfo->numHorzSlices = rszFmDivPrm->numHorzSlices;
pReszInfo->numVertSlices = rszFmDivPrm->numVertSlices;
CSL_ipipeSetRszFmDivPrm( rszFmDivPrm);
if(pReszInfo->inputType==RDRV_RESZ__YUV422_INPUT)
{
g_pVpssIpipe->YUV_Y_MIN = 0;
g_pVpssIpipe->YUV_Y_MAX = 0xFF;
g_pVpssIpipe->YUV_C_MIN = 0;
g_pVpssIpipe->YUV_C_MAX = 0xFF;
g_pVpssIpipe->YUV_ADJ = (0<<8 |0x10);
g_pVpssIpipeIf->CFG &= (~(0X3<<2));
g_pVpssIpipeIf->CFG |= (3<<2);//SDRAM_YUV
g_pVpssIpipe->IPIPE_DPATHS = CSL_IPIPE_YUV2YUV;
}
else
{
// raw data input
g_pVpssIpipeIf->CFG &= (~(0X3<<2));
g_pVpssIpipeIf->CFG |= (1<<2);//SDRAM_RAW
g_pVpssIpipe->IPIPE_DPATHS = CSL_IPIPE_RAW2YUV;
}
g_pVpssIpipe->IRQ_EN = (TRUE <<1);
g_pVpssIpipe->IRQ_RZA = (rszFmDivOutA->outputHeight-1);
g_pVpssIpipe->IRQ_RZB = (rszFmDivOutB->outputHeight-1);
gRDRV_RESZ_modeData.ipipeifTiming.clkSelect = 1;//IPIPEIF_CLK_SDRAM;
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv = IPIPEIF_AUTOCALC;
if(pReszInfo->clkDiv!=RDRV_RESZ__AUTO_CALC)
{
switch(pReszInfo->clkDiv)
{
case 0:
case 1:
case 2:
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv = IPIPEIF_ONE_HALF;
break;
case 3:
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv = IPIPEIF_ONE_THIRD;
break;
case 4:
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv = IPIPEIF_ONE_FOURTH;
break;
case 5:
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv = IPIPEIF_ONE_FIFTH;
break;
case 6:
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv = IPIPEIF_ONE_SIXTH;
break;
case 7:
case 8:
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv = IPIPEIF_ONE_EIGHTH;
break;
default:
if(pReszInfo->clkDiv<=16)
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv =IPIPEIF_ONE_SIXTEENTH;
else
if(pReszInfo->clkDiv<=32)
gRDRV_RESZ_modeData.ipipeifTiming.clkDiv =IPIPEIF_ONE_THIRTYSECOND;
}
}
g_pVpssIpipeIf->CFG &=( ~2);// no decimation
if(pReszInfo->inputType!=RDRV_RESZ__YUV422_INPUT)
{
g_pVpssIpipe->IPIPE_VST = 0;
}
g_pVpssIpipe->IPIPE_HST = inputStartXOffset;
// set all in one shot mode
g_pVpssIpipe->IPIPE_MODE = 1;
g_pVpssIpipe->RSZ[0].RSZ_MODE = 1;
g_pVpssIpipe->RSZ[1].RSZ_MODE = 1;
g_pVpssIpipeIf->CFG |= 1;
g_pVpssBufLogic->MEMCTRL |= (1<<2);
return (0);
}
int CSL_ipipeifAutoSetTiming(CSL_IpipeifTimingConfig *data)
{
UINT8 vclk, i;
UINT8 mult = 1;
UINT32 h[2], rsz, sum, ratio, ratio_low, horz, horz_low;
UINT32 r[2] = {0, 0};
UINT32 x[2] = {0, 0};
UINT8 hash[8] = {2, 3, 4, 5, 6, 8, 16, 32};
IpipeifClkDiv div, div_low;
if(data == NULL)
return (-1);
if(!((g_pVpssIpipeIf->CFG>>2) & 1)) // If input source is CCDC or Darkframe, fail.
return (-1);
g_pVpssIpipeIf->CFG &= (~(1<<10));
g_pVpssIpipeIf->CFG |= ((data->clkSelect<<10));
// Calculate VD intervals
vclk = (g_pVpssIpipeIf->CFG&1) ? 10 : 4;
g_pVpssIpipeIf->LPFR = data->vdInterval = g_pVpssIpipeIf->VNUM+vclk; // IPIPE requires input height + (4 or 10) clocks
// Calculate HD intervals
if(g_pVpssIpipeIf->CFG&2) // If decimation on, multiply required extra clocks by resize ratio
{
mult = (g_pVpssIpipeIf->RSZ >> 4)+1;
g_pVpssIpipeIf->PPLN = data->hdInterval = g_pVpssIpipeIf->HNUM+(8*mult); // IPIPE requires input width + 8 clocks
horz = (data->hdInterval<<4)/g_pVpssIpipeIf->RSZ;
}
else
{
g_pVpssIpipeIf->PPLN = data->hdInterval = g_pVpssIpipeIf->HNUM+8; // IPIPE requires input width + 8 clocks
horz = data->hdInterval;
}
// Calculate required clock divider
for(i=0;i<2;i++)
{
if(g_pVpssIpipe->RSZ[i].RSZ_EN)
{
h[i] = (g_pVpssIpipe->RSZ[i].RSZ_O_HSZ + g_pVpssIpipe->RSZ[i].RSZ_O_HST + 1); // divide by 1 case
if((rsz = g_pVpssIpipe->RSZ[i].RSZ_H_DIF) > 256)
h[i] = (h[i]*rsz) >> 8; // divide by horz_rsz_ratio case
r[i] = 255/(g_pVpssIpipe->RSZ[i].RSZ_V_DIF<<1)+1; // ceil(vert_rsz_ratio/2)
x[i] = h[i]*r[i];
}
}
sum = ((x[0] + x[1] + 100*(r[0] + r[1]))*5)>>2; // ha*ra + hb*rb + overhead + 25% margin
if(data->clkDiv != IPIPEIF_AUTOCALC) // User Specified Clock Divider mode
{
horz_low = (sum-1)/hash[data->clkDiv] + 1;
if(horz_low > horz)
g_pVpssIpipeIf->PPLN = data->hdInterval = horz_low*mult;
}
else // Auto-calculate all timing mode
{
ratio = (sum-1)/(horz*mult) + 1; // Round up
switch(ratio)
{
case 0:
case 1:
case 2:
div = IPIPEIF_ONE_HALF;
ratio_low = 2;
div_low = div;
break;
case 3:
div = IPIPEIF_ONE_THIRD;
ratio_low = 2;
div_low = IPIPEIF_ONE_HALF;
break;
case 4:
div = IPIPEIF_ONE_FOURTH;
ratio_low = 3;
div_low = IPIPEIF_ONE_THIRD;
break;
case 5:
div = IPIPEIF_ONE_FIFTH;
ratio_low = 4;
div_low = IPIPEIF_ONE_FOURTH;
break;
case 6:
div = IPIPEIF_ONE_SIXTH;
ratio_low = 5;
div_low = IPIPEIF_ONE_FIFTH;
break;
case 7:
case 8:
div = IPIPEIF_ONE_EIGHTH;
ratio_low = 6;
div_low = IPIPEIF_ONE_SIXTH;
break;
default :
if(ratio<=16) {
div = IPIPEIF_ONE_SIXTEENTH;
ratio_low = 8;
div_low =IPIPEIF_ONE_EIGHTH;
}
else if (ratio<=32) {
div = IPIPEIF_ONE_THIRTYSECOND;
ratio_low = 16;
div_low = IPIPEIF_ONE_SIXTEENTH;
}
else return (-1);
break;
};
horz_low = (sum-1)/ratio_low + 1; // Find the PPLN required for the lower clock divider
if(horz_low*ratio_low < horz*ratio) // Determine if the lower clock with higher PPLN is faster or not
{
data->clkDiv = div_low;
g_pVpssIpipeIf->PPLN = data->hdInterval = horz_low*mult;
}
else
data->clkDiv = div;
}
g_pVpssIpipeIf->CFG &= (~(7<<4));
g_pVpssIpipeIf->CFG |= ((data->clkDiv<<4));
return (0);
}
int RDRV_RESZ_SPEC_Start(UINT32 mode)
{
if(gRDRV_RESZ_modeData.rszFmDivPrm.rza!=NULL)
{
g_pVpssIpipe->RSZ[0].RSZ_EN = 1;
g_pVpssIpipe->RSZ[0].RSZ_MODE = (mode&0x1);
}
if(gRDRV_RESZ_modeData.rszFmDivPrm.rzb!=NULL)
{
g_pVpssIpipe->RSZ[1].RSZ_EN = 1;
g_pVpssIpipe->RSZ[1].RSZ_MODE = (mode&0x1);
}
CSL_ipipeifAutoSetTiming(&gRDRV_RESZ_modeData.ipipeifTiming);
g_pVpssIpipe->IPIPE_EN = 1;
g_pVpssIpipeIf->ENABLE =1;
return (0);
}
BOOL Video_WaitForFinished()
{
BOOL isBusy ;
isBusy = (g_pVpssIpipeIf->ENABLE == 1) || (g_pVpssIpipe->IPIPE_EN == 1);
return (isBusy);
}
void Video_ResizeWait(void)
{
if(!g_pVpssIpipe)
return;
while(Video_WaitForFinished());
}
void CalResize(PREVIEW_RESIZE_INIT *PreviewResizeInitIn)
{
RDRV_RESZ_OutputInfo_t output;
RDRV_RESZ_ResizeInfo_t resize;
output.outputHeight = PreviewResizeInitIn->wOutHeight;
output.outputWidth = PreviewResizeInitIn->wOutWidth;
output.outputLineOffset = PreviewResizeInitIn->wInBufWidth;
output.outputLineOffset = PreviewResizeInitIn->outBufWidth;
output.outputAddr = PreviewResizeInitIn->outaddr;
output.outputBufHeight = RDRV_RESZ__AUTO_CALC;
resize.clkDiv = RDRV_RESZ__AUTO_CALC;
resize.numVertSlices = RDRV_RESZ__AUTO_CALC;
resize.numLinesPerResize = RDRV_RESZ__AUTO_CALC;
resize.pRszA = &output;
resize.pRszB = NULL;
resize.inputAddr = PreviewResizeInitIn->inaddr;
resize.inputType = RDRV_RESZ__YUV422_INPUT;
resize.numHorzSlices = 1;
resize.inputHeight = PreviewResizeInitIn->wInHeight;
resize.inputLineOffset = PreviewResizeInitIn->wInBufWidth;//wInWidth;
resize.inputWidth = PreviewResizeInitIn->wInWidth;
resize.inputStartX = 0;
resize.inputStartY = 0;
if(resize.inputWidth <output.outputWidth ||resize.inputHeight<output.outputHeight )
{
UINT16 ratio;
ratio = (output.outputWidth/resize.inputWidth)+1;
ratio *= (output.outputHeight/resize.inputHeight)+1;
resize.clkDiv = 4;
if(ratio>resize.clkDiv)
resize.clkDiv = ratio;
}
else
{
resize.clkDiv = 3;
}
RDRV_RESZ_SPEC_Setup(&resize);
}
void ResizeInit(
UINT16 inWidth,
UINT16 inHeight,
UINT16 inBufWidth,
UINT16 outWidth,
UINT16 outHeight,
UINT16 outBufoffsetWidth,
UINT32 inAddr,
UINT32 outAddr)
{
PREVIEW_RESIZE_INIT ResizeInit;
ResizeInit.wInWidth = inWidth; // Width captured to be used as source
ResizeInit.wInHeight = inHeight; // Height captured to be used as source
ResizeInit.wInBufWidth = inBufWidth; // Width captured by hardware
ResizeInit.wOutWidth = outWidth; // Width desired after resize
ResizeInit.wOutHeight = outHeight; // Height desired after resize
ResizeInit.outBufWidth = outBufoffsetWidth;
ResizeInit.inaddr = inAddr;
ResizeInit.outaddr = outAddr;
CalResize(&ResizeInit);
}
void Cvbs_Start()
{
g_pVpssIpipe->RSZ[0].RSZ_EN = 1;
g_pVpssIpipe->RSZ[0].RSZ_MODE = 0x1;
g_pVpssIpipe->IPIPE_EN = 1;
g_pVpssIpipeIf->ENABLE =1;
}
void CvbsStop()
{
g_pVpssIpipe->RSZ[0].RSZ_EN = 0;
g_pVpssIpipe->IPIPE_EN = 0;
g_pVpssIpipeIf->ENABLE =0;
}
void VideoInit()
{
CvbsStop();
TVP5150_Init();
PrevInit();
}
void YUV2RGB(BYTE *pRGB,BYTE *pYUV)
{
int r, g, b;
BYTE y0,y1, u, v;
int i,j;
UINT8 *tmp = (UINT8*)RGB+512;
INT32 *pV1 = V1;
INT32 *pU2 = U2;
INT32 vv = 0;
for(i = 0; i < 480; i++)
{
for (j = 0; j < 400; j++)
{
y0 = *pYUV; pYUV++;
u = *pYUV; pYUV++;
y1 = *pYUV; pYUV++;
v = *pYUV; pYUV++;
vv=*(pV1+v);
r = y0 + vv;
g = y0 - (vv>>1)-*(U1+u);
b = y0 + *(pU2+u);
r = *(tmp+r);
g = *(tmp+g);
b = *(tmp+b);
*(pRGB++)=((r & 0xF8) | ( g >> 5));
*(pRGB++)=(((g & 0x1C) << 3) | ( b >> 3));
r = y1 + vv;
g = y1 - (vv>>1)-*(U1+u);
b = y1 + *(pU2+u);
r = *(tmp+r);
g = *(tmp+g);
b = *(tmp+b);
*(pRGB++)=((r & 0xF8) | ( g >> 5));
*(pRGB++)=(((g & 0x1C) << 3) | ( b >> 3));
}
}
}
BOOL VideoHW_Init(void)
{
DWORD dwVideoIrq = CCDC_VDINT0;
PHYSICAL_ADDRESS pa;
//寄存器映射
pa.QuadPart = DM350_PA_VPSS_CLOCK_ADDRESS;
g_pVpssClk= (DM350_VPSS_CLK_REG *) MmMapIoSpace(pa, sizeof(DM350_VPSS_CLK_REG), FALSE);
pa.QuadPart = DM350_PA_VPSSBUF_ADDRESS;
g_pVpssBufLogic= (DM350_VPSS_BUFLOGIC_REG *) MmMapIoSpace(pa, sizeof(DM350_VPSS_BUFLOGIC_REG), FALSE);
pa.QuadPart = (DWORD)DM350_PA_IPIPE_INTERFACE_ADDRESS;
g_pVpssIpipeIf = (DM350_IPIPEIF_REG *)MmMapIoSpace(pa, sizeof(DM350_IPIPEIF_REG), FALSE);
pa.QuadPart = DM350_PA_IPIPE_ADDRESS;
g_pVpssIpipe = (DM350_IPIPE_REG *) MmMapIoSpace(pa, sizeof(DM350_IPIPE_REG), FALSE);
pa.QuadPart = DM350_PA_CCDC_ADDRESS;
g_pVpssCcdc = (DM350_CCDC_REG *) MmMapIoSpace(pa, sizeof(DM350_CCDC_REG), FALSE);
pa.QuadPart = DM350_PA_OSD_ADDRESS;
g_pOsd = (DM350_OSD_REG *) MmMapIoSpace(pa, sizeof(DM350_OSD_REG), FALSE);
pa.QuadPart = DM350_PA_VENC_ADDRESS;
g_pVenc = (DM350_VENC_REG *) MmMapIoSpace(pa, sizeof(DM350_VENC_REG), FALSE);
if (!g_pVpssClk || !g_pVpssBufLogic || !g_pVpssIpipeIf || !g_pVpssIpipe || !g_pVpssCcdc || !g_pVenc || !g_pOsd)
{
RETAILMSG(1, (TEXT("VIDEO::VirtualBase MmMapIoSpace failed !\r\n")));
return(FALSE);
}
//Map frame buffer into process space memory
m_VirtualCCDCFrameBuffer = (BYTE *)VirtualAlloc(0, (0x100000), MEM_RESERVE, PAGE_NOACCESS);
if (m_VirtualCCDCFrameBuffer == NULL)
{
RETAILMSG(1,(TEXT("m_VirtualCCDCFrameBuffer is not allocated\r\n")));
return FALSE;
}
else if (!VirtualCopy((PVOID)m_VirtualCCDCFrameBuffer,
(PVOID)(CCDC_FRAME_BUFFER_PHYADDR | 0xa0000000), (0x100000), PAGE_READWRITE | PAGE_NOCACHE))
{
RETAILMSG(1, (TEXT("m_VirtualITUVIDEOFrameBuffer is not mapped\r\n")));
VirtualFree((PVOID)m_VirtualCCDCFrameBuffer, 0, MEM_RELEASE);
return FALSE;
}
memset(m_VirtualCCDCFrameBuffer, 0x00, 0x100000);
m_VirtualVideoFrameBuffer = (BYTE *)VirtualAlloc(0, (0x100000), MEM_RESERVE, PAGE_NOACCESS);
if (m_VirtualVideoFrameBuffer == NULL)
{
RETAILMSG(1,(TEXT("m_VirtualVideoFrameBuffer is not allocated\r\n")));
return FALSE;
}
else if (!VirtualCopy((PVOID)m_VirtualVideoFrameBuffer,
(PVOID)(VIDEO_FRAME_BUFFER_PHYADDR | 0xa0000000), (0x100000), PAGE_READWRITE | PAGE_NOCACHE))
{
RETAILMSG(1, (TEXT("m_VirtualITUVIDEOFrameBuffer is not mapped\r\n")));
VirtualFree((PVOID)m_VirtualVideoFrameBuffer, 0, MEM_RELEASE);
return FALSE;
}
memset(m_VirtualVideoFrameBuffer, 0x00, 0x100000);
VideoInit();
if (!KernelIoControl(IOCTL_HAL_REQUEST_SYSINTR, &dwVideoIrq, sizeof(DWORD), &g_dwSysIntr_Video, sizeof(DWORD), NULL))
{
RETAILMSG(1, (TEXT("ERROR: Failed to obtain sysintr value for itu656 interrupt.\r\n")));
g_dwSysIntr_Video= SYSINTR_UNDEFINED;
return FALSE;
}
g_hVideoFrameEvent= CreateEvent(NULL,FALSE,FALSE,NULL);
if(g_hVideoFrameEvent == NULL)
{
DEBUGMSG(1, (TEXT("&&&&&&&Video::Video Event Initialize Failed\r\n")));
return FALSE;
}
g_hVideoThreadStopedEvent= CreateEvent(NULL,FALSE,FALSE,NULL);
if(g_hVideoThreadStopedEvent == NULL)
{
DEBUGMSG(1, (TEXT("&&&&&&&Video::Video Event Initialize Failed\r\n")));
return FALSE;
}
if(!InterruptInitialize(g_dwSysIntr_Video,g_hVideoFrameEvent,NULL,0))
{
DEBUGMSG(1, (TEXT("&&&&&&&Video::Video Interrupt Initialize Failed\r\n")));
return FALSE;
}
#if 0
VideoHW_Open();
RETAILMSG(1, (TEXT("5150 close windws\r\n")));
g_pOsd->OSDWIN0MD =0;
while(1);
#endif
// RETAILMSG(1, (TEXT("&&&&&&&Video::HW_Init Start Success\r\n")));
return TRUE;
}
BOOL VideoHW_Open(void)
{
// RETAILMSG(1, (TEXT("&&&&&&&Video::VideoHW_Open Start\r\n")));
CvbsStop();
if(IsPal = GetPalMode())
{
ResizeInit(SOURCE_WIDTH_PAL,SOURCE_HEIGHT_PAL_TEST,SOURCE_WIDTH_PAL,
LCD_PHY_PIXEL_CY,LCD_PHY_PIXEL_CX+2,LCD_PHY_PIXEL_CY,
CCDC_FRAME_BUFFER_PHYADDR_TEST,VIDEO_FRAME_BUFFER_PHYADDR);
CCDC_ConFigureVideo(SOURCE_WIDTH_PAL*2);
BSO_OSDSetVidWinAddress(VIDEO_FRAME_BUFFER_VIRADDR+LCD_PHY_PIXEL_CY*4);
}
else
{
ResizeInit(SOURCE_WIDTH_NTSC,SOURCE_HEIGHT_NTSC,SOURCE_WIDTH_NTSC,
LCD_PHY_PIXEL_CY,LCD_PHY_PIXEL_CX,LCD_PHY_PIXEL_CY,
CCDC_FRAME_BUFFER_PHYADDR,VIDEO_FRAME_BUFFER_PHYADDR);
CCDC_ConFigureVideo(SOURCE_WIDTH_NTSC*2);
BSO_OSDSetVidWinAddress(VIDEO_FRAME_BUFFER_VIRADDR);
}
RDRV_RESZ_SPEC_Start(1);
bThreadTerminal = FALSE;
g_hVideoFrameThread= CreateThread(NULL, 0, (LPTHREAD_START_ROUTINE) VideoHW_MonitorThread, NULL, 0, NULL);
if ( g_hVideoFrameThread == NULL )
{
RETAILMSG(1, (TEXT("&&&&&&&Video::Fatal Error! Failed to create VideoHW_MonitorThread.\r\n")));
return (FALSE);
}
SetThreadPriority(g_hVideoFrameThread, THREAD_PRIORITY_NORMAL);
// RETAILMSG(1, (TEXT("&&&&&&&Video::VideoHW_Open ok\r\n")));
return TRUE;
}
BOOL VideoHW_Deinit()
{
bThreadTerminal = TRUE;
WaitForSingleObject(g_hVideoThreadStopedEvent, INFINITE);
OSD_SetDisTransparency();
if(g_hVideoFrameThread != NULL)
{
if(CloseHandle(g_hVideoFrameThread))
{
g_hVideoFrameThread = NULL;
}
else
return FALSE;
}
return TRUE;
}
BOOL VideoHW_Close()
{
return VideoHW_Deinit();
}
DWORD VideoHW_MonitorThread(PVOID pParms)
{
BOOL bTempPal;
static BOOL bHaveSign;
DWORD dwTickCount, dwTickCountStart=0;
// DWORD dwOSDVirAddrBase;
// UINT16* pTemp;
bHaveSign = FALSE;
Sleep(10);
//RETAILMSG(1, (TEXT("&&&&&&&Video::VideoHW_MonitorThread Start\r\n")));
InterruptDone(g_dwSysIntr_Video);
while(1)
{
WaitForSingleObject(g_hVideoFrameEvent, INFINITE);
dwTickCount = GetTickCount() - dwTickCountStart;
dwTickCountStart = GetTickCount();
// int m,n,i;
// RETAILMSG(1, (L"%d\r\n",dwTickCount));
if(bThreadTerminal)
break;
#if 0
RETAILMSG(1, (L"end\r\n"));
RETAILMSG(1, (L"RSZ_EN=%x\r\n",g_pVpssIpipe->RSZ[0].RSZ_EN));
RETAILMSG(1, (L"RSZ_MODE=%x\r\n",g_pVpssIpipe->RSZ[0].RSZ_MODE));
RETAILMSG(1, (L"IPIPE_EN=%x\r\n",g_pVpssIpipe->IPIPE_EN));
RETAILMSG(1, (L"If->ENABLE=%x\r\n",g_pVpssIpipeIf->ENABLE));
RETAILMSG(1, (L"If->CFG=%x\r\n",g_pVpssIpipeIf->CFG));
RETAILMSG(1, (L"If->LPFR=%x\r\n",g_pVpssIpipeIf->LPFR));
RETAILMSG(1, (L"If->PPLN=%x\r\n",g_pVpssIpipeIf->PPLN));
#endif
if(HaveSign())
{
// RDRV_RESZ_SPEC_Start(1);
bTempPal = GetPalMode();
if(bTempPal != IsPal)
{
IsPal = bTempPal;
CvbsStop();
if(IsPal)
{
ResizeInit(SOURCE_WIDTH_PAL,SOURCE_HEIGHT_PAL_TEST,SOURCE_WIDTH_PAL,
LCD_PHY_PIXEL_CY,LCD_PHY_PIXEL_CX+2,LCD_PHY_PIXEL_CY,
CCDC_FRAME_BUFFER_PHYADDR_TEST,VIDEO_FRAME_BUFFER_PHYADDR);
CCDC_ConFigureVideo(SOURCE_WIDTH_PAL*2);
BSO_OSDSetVidWinAddress(VIDEO_FRAME_BUFFER_VIRADDR+LCD_PHY_PIXEL_CY*4);
}
else
{
ResizeInit(SOURCE_WIDTH_NTSC,SOURCE_HEIGHT_NTSC,SOURCE_WIDTH_NTSC,
LCD_PHY_PIXEL_CY,LCD_PHY_PIXEL_CX,LCD_PHY_PIXEL_CY,
CCDC_FRAME_BUFFER_PHYADDR,VIDEO_FRAME_BUFFER_PHYADDR);
CCDC_ConFigureVideo(SOURCE_WIDTH_NTSC*2);
BSO_OSDSetVidWinAddress(VIDEO_FRAME_BUFFER_VIRADDR);
}
RDRV_RESZ_SPEC_Start(1);
#if 0
dwOSDVirAddrBase = ((g_pOsd->OSDWINADH << 16) + g_pOsd->OSDWIN0ADL)*32 + DIS_SDRAM_VALADDR_BASE;
pTemp = (UINT16 *)dwOSDVirAddrBase;
for(i=0;i<LCD_PHY_PIXEL_CY*LCD_PHY_PIXEL_CX;)
{
pTemp[i++] = 0xf81f;
pTemp[i++] = 0xf81f;
pTemp[i++] = 0xf81f;
pTemp[i++] = 0xf81f;
pTemp[i++] = 0xf81f;
pTemp[i++] = 0xf81f;
pTemp[i++] = 0xf81f;
pTemp[i++] = 0xf81f;
}
#endif
}
else
{
// RDRV_RESZ_SPEC_Start(1);
g_pVpssIpipe->RSZ[0].RSZ_EN = 1;
g_pVpssIpipe->IPIPE_EN = 1;
g_pVpssIpipeIf->ENABLE =1;
}
// Video_WaitForFinished();
#if 0
RETAILMSG(1, (L"start\r\n"));
RETAILMSG(1, (L"RSZ_EN=%x\r\n",g_pVpssIpipe->RSZ[0].RSZ_EN));
RETAILMSG(1, (L"RSZ_MODE=%x\r\n",g_pVpssIpipe->RSZ[0].RSZ_MODE));
RETAILMSG(1, (L"IPIPE_EN=%x\r\n",g_pVpssIpipe->IPIPE_EN));
RETAILMSG(1, (L"If->ENABLE=%x\r\n",g_pVpssIpipeIf->ENABLE));
RETAILMSG(1, (L"If->CFG=%x\r\n",g_pVpssIpipeIf->CFG));
RETAILMSG(1, (L"If->LPFR=%x\r\n",g_pVpssIpipeIf->LPFR));
RETAILMSG(1, (L"If->PPLN=%x\r\n",g_pVpssIpipeIf->PPLN));
#endif
if(uGrabMap == 1)
{
Video_WaitForFinished();
// YUV2RGB((BYTE*)VIDEO_OUT_BUFFER_VIRADDR,(BYTE*)VIDEO_FRAME_BUFFER_VIRADDR);
uGrabMap = 2;
while(uGrabMap)
{
Sleep(10);
}
}
}
InterruptDone(g_dwSysIntr_Video);
}
SetEvent(g_hVideoThreadStopedEvent);
// RETAILMSG(1, (_T("Video::VideoHW_MonitorThread Stop\r\n")));
return 0;
}
BOOL VideoHW_SetTransColor(BYTE *pbColorMask)
{
UINT16 TransColor;
TransColor = pbColorMask[0] | (pbColorMask[1] << 8);
g_pOsd->TRANSPVALL = TransColor;
return TRUE;
}
BOOL VideoHW_GetTransColor(BYTE *pbColorMask)
{
UINT16 TransColor;
TransColor = g_pOsd->TRANSPVALL;
pbColorMask[0] = TransColor & 0xff;
pbColorMask[1] = (TransColor>>8) & 0xff;
return TRUE;
}
BYTE VideoHW_Get_NTS_PAL_Signal(void)
{
return GetPalMode();
}
BYTE VideoHW_GetActiveSignal(void)
{
return HaveSign();
}
BYTE VideoHW_GetBright()
{
BYTE Ret;
Ret = Tvp5150ReadReg(0x09);
return Ret;
}
BOOL VideoHW_SetBright(BYTE *pbColorMask)
{
Tvp5150WriteReg(0x09,pbColorMask[0]);
return TRUE;
}
BYTE VideoHW_GetSaturation()
{
BYTE Ret;
Ret = Tvp5150ReadReg(0x0A);
return Ret;
}
BOOL VideoHW_SetSaturation(BYTE *pbColorMask)
{
Tvp5150WriteReg(0x0A,pbColorMask[0]);
return TRUE;
}
BYTE VideoHW_GetHue()
{
BYTE Ret;
Ret = Tvp5150ReadReg(0x0B);
return Ret;
}
BOOL VideoHW_SetHue(BYTE *pbColorMask)
{
Tvp5150WriteReg(0x0B,pbColorMask[0]);
return TRUE;
}
BYTE VideoHW_GetCONTRAST()
{
BYTE Ret;
Ret = Tvp5150ReadReg(0x0C);
return Ret;
}
BOOL VideoHW_SetCONTRAST(BYTE *pbColorMask)
{
Tvp5150WriteReg(0x0C,pbColorMask[0]);
return TRUE;
}
BOOL VideoHW_CapturMap(DWORD *pRGBOut,DWORD dwLenOut)
{
BOOL bRet = FALSE;
static BYTE Times;
// RETAILMSG(1, (L"dwLenOut2=%d\r\n",dwLenOut));
if(uGrabMap != 0)
return bRet;
if(HaveSign())
{
if(g_hVideoFrameThread != NULL)
{
// YUV2RGB(pRGB,pYUV);
bRet = TRUE;
}
else
bRet = FALSE;
}
else
bRet = FALSE;
if(bRet)
{
Times = 0;
uGrabMap = 1;
while(1)
{
if(uGrabMap == 2)
{
memcpy(pRGBOut,(DWORD*)VIDEO_FRAME_BUFFER_VIRADDR,dwLenOut);
uGrabMap = 0;
break;
}
else
Sleep(10);
if(Times++ >100)
{
bRet = FALSE;
uGrabMap = 0;
break;
}
}
}
return bRet;
// return TRUE;
}
software scale: extern "C" void Scale288Buff(unsigned char *sbuf,unsigned char *dbuf);
YLINE_LENTH_ONE EQU 864
YLINE_LENTH_TWO EQU 1728
YLINE_LENTH_THREE EQU 2596
YLINE_LENTH_FOUR EQU 3456
YLINE_LENTH_FIVE EQU 4320
TABLE_O_EIGHT EQU 205
TABLE_O_TWO EQU 52
TABLE_O_SIX EQU 154
TABLE_O_FOUR EQU 103
TABLE_O_ONE EQU 26
TABLE_O_THREE EQU 77
TABLE_O_SEVEN EQU 180
TABLE_O_NINE EQU 231
INCLUDE kxarm.h
TEXTAREA
MACRO
LDR5STRB $src, $tmp1, $tmp2 ,$tmp3, $tmp4, $tmp5, $tmp6, $tmp7, $tmp8
;-----B1=0.8*b1+0.2*c1 B2=0.8*b2+0.2*c2 B3=0.8*b3+0.2*c3 B4=0.8*b4+0.2*c4---
add $tmp1,$src,#YLINE_LENTH_ONE
ldr $tmp2, [$tmp1] ;b1,b2,b3,b4
add $tmp1,$src,#YLINE_LENTH_TWO
ldr $tmp3, [$tmp1] ;c1,c2,c3,c4
;-------------B1=0.8*b1+0.2*c1--------------------
and $tmp4,$tmp2,#0xff ;b1
mov $tmp8,#TABLE_O_EIGHT
mul $tmp1,$tmp8,$tmp4 ;0.8b1
and $tmp4,$tmp3,#0xff ;c1
mov $tmp8,#TABLE_O_TWO
mul $tmp4,$tmp8,$tmp4 ;0.2c1
add $tmp1, $tmp1, $tmp4
mov $tmp5, $tmp1, lsr #8 ;B1=0.8*b1+0.2*c1
;-------------B2=0.8*b2+0.2*c2--------------------
mov $tmp4, $tmp2, lsr #8
and $tmp4,$tmp4,#0xff ;b2
mov $tmp8,#TABLE_O_EIGHT
mul $tmp1,$tmp8,$tmp4 ;0.8b2
mov $tmp4, $tmp3, lsr #8
and $tmp4,$tmp4,#0xff ;c2
mov $tmp8,#TABLE_O_TWO
mul $tmp4,$tmp8,$tmp4 ;0.2c2
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;B2=0.8*b2+0.2*c2
orr $tmp5, $tmp5, $tmp1, lsl #8
;-------------B3=0.8*b3+0.2*c3--------------------
mov $tmp4, $tmp2, lsr #16
and $tmp4,$tmp4,#0xff ;b3
mov $tmp8,#TABLE_O_EIGHT
mul $tmp1,$tmp8,$tmp4 ;0.8b3
mov $tmp4, $tmp3, lsr #16
and $tmp4,$tmp4,#0xff ;c3
mov $tmp8,#TABLE_O_TWO
mul $tmp4,$tmp8,$tmp4 ;0.2c3
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;B3=0.8*b3+0.2*c3
orr $tmp5, $tmp5, $tmp1, lsl #16
;-------------B4=0.8*b4+0.2*c4--------------------
mov $tmp4, $tmp2, lsr #24 ;b4
mov $tmp8,#TABLE_O_EIGHT
mul $tmp1,$tmp8,$tmp4 ;0.8b4
mov $tmp4, $tmp3, lsr #24 ;c4
mov $tmp8,#TABLE_O_TWO
mul $tmp4,$tmp8,$tmp4 ;0.2c4
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;B4=0.8*b4+0.2*c4
orr $tmp5, $tmp5, $tmp1, lsl #24
;-----C1=0.6*c1+0.4*d1 C2=0.6*c2+0.4*d2 C3=0.6*c3+0.4*d3 C4=0.6*c4+0.4*d4---
add $tmp1,$src,#YLINE_LENTH_TWO
add $tmp1,$tmp1,#YLINE_LENTH_ONE
ldr $tmp2, [$tmp1] ;d1,d2,d3,d4
;-------------C1=0.6*c1+0.4*d1--------------------
and $tmp4,$tmp3,#0xff ;c1
mov $tmp8,#TABLE_O_SIX
mul $tmp1,$tmp8,$tmp4 ;0.6c1
and $tmp4,$tmp2,#0xff ;d1
mov $tmp8,#TABLE_O_FOUR
mul $tmp4,$tmp8,$tmp4 ;0.4d1
add $tmp1, $tmp1, $tmp4
mov $tmp6, $tmp1, lsr #8 ;C1=0.6*c1+0.4*d1
;-------------C2=0.6*c2+0.4*d2--------------------
mov $tmp4, $tmp3, lsr #8
and $tmp4,$tmp4,#0xff ;c2
mov $tmp8,#TABLE_O_SIX
mul $tmp1,$tmp8,$tmp4 ;0.6c2
mov $tmp4, $tmp2, lsr #8
and $tmp4,$tmp4,#0xff ;d2
mov $tmp8,#TABLE_O_FOUR
mul $tmp4,$tmp8,$tmp4 ;0.4d2
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;C2=0.6*c2+0.4*d2
orr $tmp6, $tmp6, $tmp1, lsl #8
;-------------C3=0.6*c3+0.4*d3--------------------
mov $tmp4, $tmp3, lsr #16
and $tmp4,$tmp4,#0xff ;c3
mov $tmp8,#TABLE_O_SIX
mul $tmp1,$tmp8,$tmp4 ;0.6c3
mov $tmp4, $tmp2, lsr #16
and $tmp4,$tmp4,#0xff ;d3
mov $tmp8,#TABLE_O_FOUR
mul $tmp4,$tmp8,$tmp4 ;0.4d3
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;C3=0.6*c3+0.4*d3
orr $tmp6, $tmp6, $tmp1, lsl #16
;-------------C4=0.6*c4+0.4*d4--------------------
mov $tmp4, $tmp3, lsr #24 ;c4
mov $tmp8,#TABLE_O_SIX
mul $tmp1,$tmp8,$tmp4 ;0.6c4
mov $tmp4, $tmp2, lsr #24 ;d4
mov $tmp8,#TABLE_O_FOUR
mul $tmp4,$tmp8,$tmp4 ;0.4d4
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;C4=0.6*c4+0.4*d4
orr $tmp6, $tmp6, $tmp1, lsl #24
;-----D1=0.4*d1+0.6*e1 D2=0.4*d2+0.6*e2 D3=0.4*d3+0.6*e3 D4=0.4*d4+0.6*e4---
add $tmp1,$src,#YLINE_LENTH_FOUR
ldr $tmp3, [$tmp1] ;e1,e2,e3,e4
;-------------D1=0.4*d1+0.6*e1--------------------
and $tmp4,$tmp2,#0xff ;d1
mov $tmp8,#TABLE_O_FOUR
mul $tmp1,$tmp8,$tmp4 ;0.4d1
and $tmp4,$tmp3,#0xff ;e1
mov $tmp8,#TABLE_O_SIX
mul $tmp4,$tmp8,$tmp4 ;0.6e1
add $tmp1, $tmp1, $tmp4
mov $tmp7, $tmp1, lsr #8 ;D1=0.4*d1+0.6*e1
;-------------D2=0.4*d2+0.6*e2--------------------
mov $tmp4, $tmp2, lsr #8
and $tmp4,$tmp4,#0xff ;d2
mov $tmp8,#TABLE_O_FOUR
mul $tmp1,$tmp8,$tmp4 ;0.4d2
mov $tmp4, $tmp3, lsr #8
and $tmp4,$tmp4,#0xff ;e2
mov $tmp8,#TABLE_O_SIX
mul $tmp4,$tmp8,$tmp4 ;0.6e2
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;D2=0.4*d2+0.6*e2
orr $tmp7, $tmp7, $tmp1, lsl #8
;-------------D3=0.4*d3+0.6*e3--------------------
mov $tmp4, $tmp2, lsr #16
and $tmp4,$tmp4,#0xff ;d3
mov $tmp8,#TABLE_O_FOUR
mul $tmp1,$tmp8,$tmp4 ;0.4d3
mov $tmp4, $tmp3, lsr #16
and $tmp4,$tmp4,#0xff ;e3
mov $tmp8,#TABLE_O_SIX
mul $tmp4,$tmp8,$tmp4 ;0.6e3
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;D3=0.4*d3+0.6*e3
orr $tmp7, $tmp7, $tmp1, lsl #16
;-------------D4=0.4*d4+0.6*e4--------------------
mov $tmp4, $tmp2, lsr #24 ;d4
mov $tmp8,#TABLE_O_FOUR
mul $tmp1,$tmp8,$tmp4 ;0.4d4
mov $tmp4, $tmp3, lsr #24 ;e4
mov $tmp8,#TABLE_O_SIX
mul $tmp4,$tmp8,$tmp4 ;0.6e4
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;D4=0.4*d4+0.6*e4
orr $tmp7, $tmp7, $tmp1, lsl #24
;-----E1=0.2*e1+0.8*f1 E2=0.2*e2+0.8*f2 E3=0.2*e3+0.8*f3 E4=0.2*e4+0.8*f4---
add $tmp1,$src,#YLINE_LENTH_TWO
add $tmp1,$tmp1,#YLINE_LENTH_TWO
add $tmp1,$tmp1,#YLINE_LENTH_ONE
ldr $tmp2, [$tmp1] ;f1,f2,f3,f4
;-------------E1=0.2*e1+0.8*f1--------------------
and $tmp4,$tmp3,#0xff ;e1
mov $tmp8,#TABLE_O_TWO
mul $tmp1,$tmp8,$tmp4 ;0.2e1
and $tmp4,$tmp2,#0xff ;f1
mov $tmp8,#TABLE_O_EIGHT
mul $tmp4,$tmp8,$tmp4 ;0.6f1
add $tmp1, $tmp1, $tmp4
mov $tmp8, $tmp1, lsr #8 ;E1=0.2*e1+0.8*f1
;-------------E2=0.2*e2+0.8*f2--------------------
mov $tmp4, $tmp3, lsr #8
and $tmp4,$tmp4,#0xff ;e2
mov $tmp1,#TABLE_O_TWO
mul $tmp1,$tmp4,$tmp1 ;0.2e2
orr $tmp8, $tmp8, $tmp1, lsl #8
mov $tmp4, $tmp2, lsr #8
and $tmp4,$tmp4,#0xff ;f2
mov $tmp1,#TABLE_O_EIGHT
mul $tmp4,$tmp1,$tmp4 ;0.8f2
mov $tmp1, $tmp8, lsr #8
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;E2=0.2*e2+0.8*f2
and $tmp4,$tmp8,#0xff
orr $tmp8, $tmp4, $tmp1, lsl #8
;-------------E3=0.2*e3+0.8*f3--------------------
mov $tmp4, $tmp3, lsr #16
and $tmp4,$tmp4,#0xff ;e3
mov $tmp1,#TABLE_O_TWO
mul $tmp1,$tmp4,$tmp1 ;0.2e3
orr $tmp8, $tmp8, $tmp1, lsl #16
mov $tmp4, $tmp2, lsr #16
and $tmp4,$tmp4,#0xff ;f3
mov $tmp1,#TABLE_O_EIGHT
mul $tmp4,$tmp1,$tmp4 ;0.8f3
mov $tmp1, $tmp8, lsr #16
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;E3=0.2*e3+0.8*f3
mov $tmp8, $tmp8, lsl #16
mov $tmp8, $tmp8, lsr #16
orr $tmp8, $tmp8, $tmp1, lsl #16
;-------------E4=0.2*e4+0.8*f4--------------------
mov $tmp4, $tmp3, lsr #24 ;e4
mov $tmp1,#TABLE_O_TWO
mul $tmp1,$tmp4,$tmp1 ;0.2e4
mov $tmp4, $tmp2, lsr #24 ;f4
mov $tmp2,#TABLE_O_EIGHT
mul $tmp4,$tmp2,$tmp4 ;0.8f4
add $tmp1, $tmp1, $tmp4
mov $tmp1, $tmp1, lsr #8 ;E4=0.2*e4+0.8*f4
orr $tmp8, $tmp8, $tmp1, lsl #24
;-----------------------A1=a1 A2=a2 A3=a3 A4=a4----------------------------
ldr $tmp4, [$src],#4
MEND
MACRO
LDR8STR $src,$tmp1, $tmp2 ,$tmp3,$tmp4, $tmp5 ,$tmp6, $tmp7 ,$tmp8
ldr $tmp1, [$src],#4
ldr $tmp2, [$src],#4
ldr $tmp3, [$src],#4
ldr $tmp4, [$src],#4
ldr $tmp5, [$src],#4
ldr $tmp6, [$src],#4
ldr $tmp7, [$src],#4
ldr $tmp8, [$src],#4
MEND
; Scale_288to240_Buff. Buffer (r0,r1) must be aligned.
;extern "C" void Scale_288to240_Buff(unsigned char *sbuf,unsigned char *dbuf);
LEAF_ENTRY Scale288Buff
STMFD sp!, {r2-r11}
; add r0,r0,#YLINE_LENTH_TWO
; add r0,r0,#YLINE_LENTH_TWO
; add r0,r0,#YLINE_LENTH_TWO
; add r0,r0,#YLINE_LENTH_TWO
mov r11,#39
2
mov r10,#216
1
LDR5STRB r0, r2, r3, r4, r5, r6, r7, r8, r9
add r2,r1,#YLINE_LENTH_ONE
stmia r2, {r6}
add r2,r1,#YLINE_LENTH_TWO
stmia r2, {r7}
add r2,r1,#YLINE_LENTH_TWO
add r2,r2,#YLINE_LENTH_ONE
stmia r2, {r8}
add r2,r1,#YLINE_LENTH_TWO
add r2,r2,#YLINE_LENTH_TWO
stmia r2, {r9}
stmia r1!, {r5}
subs r10, r10, #1
bne %B1
add r0,r0,#YLINE_LENTH_TWO
add r0,r0,#YLINE_LENTH_TWO
add r0,r0,#YLINE_LENTH_ONE
;add r0,r0,#YLINE_LENTH_FIVE
add r1,r1,#YLINE_LENTH_TWO
add r1,r1,#YLINE_LENTH_TWO
;add r1,r1,#YLINE_LENTH_FOUR
subs r11, r11, #1
bne %B2
mov r11,#56
4
mov r10,#27
3
LDR8STR r0, r2, r3, r4, r5, r6, r7, r8, r9
stmia r1!, {r2 - r9}
subs r10, r10, #1
bne %B3
subs r11, r11, #1
bne %B4
LDMFD sp!, {r2-r11}
IF Interworking :LOR: Thumbing
bx lr
ELSE
mov pc, lr ; return
ENDIF
END
